On Tue, Jan 06, 2026 at 12:07:52PM +0000, Leo Yan wrote:
> Sync for extended memory operation bit fields.
Hi Peter, Ingo,
This patch is important for enabling the Arm SPE feature, I appreciate
if you could give a review; otherwise, the changes in the perf cannot
proceed.
Thanks a lot!
> Reviewed-by: James Clark <james.clark@linaro.org>
> Reviewed-by: Ian Rogers <irogers@google.com>
> Signed-off-by: Leo Yan <leo.yan@arm.com>
> ---
> tools/include/uapi/linux/perf_event.h | 32 ++++++++++++++++++++++++++++++--
> 1 file changed, 30 insertions(+), 2 deletions(-)
>
> diff --git a/tools/include/uapi/linux/perf_event.h b/tools/include/uapi/linux/perf_event.h
> index c44a8fb3e4181c91a1e6e3a40e23fcf1de421af3..3d2c5ee9282efc4a2310f554443082f1d0027889 100644
> --- a/tools/include/uapi/linux/perf_event.h
> +++ b/tools/include/uapi/linux/perf_event.h
> @@ -1330,14 +1330,32 @@ union perf_mem_data_src {
> mem_snoopx : 2, /* Snoop mode, ext */
> mem_blk : 3, /* Access blocked */
> mem_hops : 3, /* Hop level */
> - mem_rsvd : 18;
> + mem_op_ext : 4, /* Extended type of opcode */
> + mem_dp : 1, /* Data processing */
> + mem_fp : 1, /* Floating-point */
> + mem_pred : 1, /* Predicated */
> + mem_atomic : 1, /* Atomic operation */
> + mem_excl : 1, /* Exclusive */
> + mem_ar : 1, /* Acquire/release */
> + mem_sg : 1, /* Scatter/Gather */
> + mem_cond : 1, /* Conditional */
> + mem_rsvd : 6;
> };
> };
> #elif defined(__BIG_ENDIAN_BITFIELD)
> union perf_mem_data_src {
> __u64 val;
> struct {
> - __u64 mem_rsvd : 18,
> + __u64 mem_rsvd : 6,
> + mem_cond : 1, /* Conditional */
> + mem_sg : 1, /* Scatter/Gather */
> + mem_ar : 1, /* Acquire/release */
> + mem_excl : 1, /* Exclusive */
> + mem_atomic : 1, /* Atomic operation */
> + mem_pred : 1, /* Predicated */
> + mem_fp : 1, /* Floating-point */
> + mem_dp : 1, /* Data processing */
> + mem_op_ext : 4, /* Extended type of opcode */
> mem_hops : 3, /* Hop level */
> mem_blk : 3, /* Access blocked */
> mem_snoopx : 2, /* Snoop mode, ext */
> @@ -1447,6 +1465,16 @@ union perf_mem_data_src {
> /* 5-7 available */
> #define PERF_MEM_HOPS_SHIFT 43
>
> +/* Extended type of memory opcode: */
> +#define PERF_MEM_EXT_OP_NA 0x0 /* Not available */
> +#define PERF_MEM_EXT_OP_MTE_TAG 0x1 /* MTE tag */
> +#define PERF_MEM_EXT_OP_NESTED_VIRT 0x2 /* Nested virtualization */
> +#define PERF_MEM_EXT_OP_MEMCPY 0x3 /* Memory copy */
> +#define PERF_MEM_EXT_OP_MEMSET 0x4 /* Memory set */
> +#define PERF_MEM_EXT_OP_SIMD 0x5 /* SIMD */
> +#define PERF_MEM_EXT_OP_GCS 0x6 /* Guarded Control Stack */
> +#define PERF_MEM_EXT_OP_SHIFT 46
> +
> #define PERF_MEM_S(a, s) \
> (((__u64)PERF_MEM_##a##_##s) << PERF_MEM_##a##_SHIFT)
>
>
> --
> 2.34.1
>