From: Roger Quadros <rogerq@ti.com>
PRU-ICSS instance consists of two PRU cores along with various
peripherals such as the Interrupt Controller (PRU_INTC), the Industrial
Ethernet Peripheral(IEP), the Real Time Media Independent Interface
controller (MII_RT), and the Enhanced Capture (eCAP) event module.
The TI Sitara AM335x ICE-V2 consists of single PRU-ICSS instance,
This patch adds the new device tree overlay file in-order to enable
PRU-ICSS instance, along with makefile changes.
The TI Sitara AM437x series of devices consists of 2 PRU-ICSS instances
(PRU-ICSS0 and PRU-ICSS1). This patch adds the device tree nodes for the
PRU-ICSS1 instance to support DUAL-MAC mode of operation. Support for
Ethernet over PRU is available only for ICSS1 instance.
am33xx-l4.dtsi, am4372.dtsi - Adds IEP and eCAP peripheral as child nodes
of the PRUSS subsystem node.
am335x-icev2-prueth.dtso, am437x-idk-evm.dts - Adds PRU-ICSS
instance node along with PRU eth port information and corresponding
port configuration. It includes interrupt mapping for packet reception,
HW timestamp collection, and PRU Ethernet ports in MII mode,
GPIO configuration, boot strapping along with delay configuration for
individual PRU Ethernet port and other required nodes.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Basharath Hussain Khaja <basharath@couthit.com>
Signed-off-by: Parvathi Pudi <parvathi@couthit.com>
---
arch/arm/boot/dts/ti/omap/Makefile | 5 +
.../ti/omap/am335x-icev2-prueth-overlay.dtso | 190 ++++++++++++++++++
arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi | 11 +
arch/arm/boot/dts/ti/omap/am4372.dtsi | 11 +
arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts | 137 ++++++++++++-
5 files changed, 353 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/ti/omap/am335x-icev2-prueth-overlay.dtso
diff --git a/arch/arm/boot/dts/ti/omap/Makefile b/arch/arm/boot/dts/ti/omap/Makefile
index 14e500846875..c68948035eca 100644
--- a/arch/arm/boot/dts/ti/omap/Makefile
+++ b/arch/arm/boot/dts/ti/omap/Makefile
@@ -82,6 +82,10 @@ dtb-$(CONFIG_ARCH_OMAP4) += \
omap4-var-stk-om44.dtb \
omap4-xyboard-mz609.dtb \
omap4-xyboard-mz617.dtb
+
+am335x-icev2-prueth-dtbs := am335x-icev2.dtb \
+ am335x-icev2-prueth-overlay.dtbo
+
dtb-$(CONFIG_SOC_AM33XX) += \
am335x-baltos-ir2110.dtb \
am335x-baltos-ir3220.dtb \
@@ -100,6 +104,7 @@ dtb-$(CONFIG_SOC_AM33XX) += \
am335x-evmsk.dtb \
am335x-guardian.dtb \
am335x-icev2.dtb \
+ am335x-icev2-prueth.dtb \
am335x-lxm.dtb \
am335x-mba335x.dtb \
am335x-moxa-uc-2101.dtb \
diff --git a/arch/arm/boot/dts/ti/omap/am335x-icev2-prueth-overlay.dtso b/arch/arm/boot/dts/ti/omap/am335x-icev2-prueth-overlay.dtso
new file mode 100644
index 000000000000..abde5119875f
--- /dev/null
+++ b/arch/arm/boot/dts/ti/omap/am335x-icev2-prueth-overlay.dtso
@@ -0,0 +1,190 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * DT overlay for IDK AM335x
+ *
+ * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
+ */
+
+/*
+ * AM335x ICE V2 board
+ * http://www.ti.com/tool/tmdsice3359
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/bus/ti-sysc.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/am33xx.h>
+#include <dt-bindings/clock/am3.h>
+
+&{/} {
+ /* Dual-MAC Ethernet application node on PRU-ICSS */
+ pruss_eth: pruss-eth {
+ compatible = "ti,am3359-prueth";
+ ti,prus = <&pru0>, <&pru1>;
+ sram = <&ocmcram>;
+ ti,mii-rt = <&pruss_mii_rt>;
+ ti,iep = <&pruss_iep>;
+ ti,ecap = <&pruss_ecap>;
+ interrupts = <20 2 2>, <21 3 3>;
+ interrupt-names = "rx_hp", "rx_lp";
+ interrupt-parent = <&pruss_intc>;
+
+ pinctrl-0 = <&pruss_eth_default>;
+ pinctrl-names = "default";
+
+ ethernet-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pruss_emac0: ethernet-port@0 {
+ reg = <0>;
+ phy-handle = <&pruss_eth0_phy>;
+ phy-mode = "mii";
+ interrupts = <20 2 2>, <26 6 6>, <23 6 6>;
+ interrupt-names = "rx", "emac_ptp_tx",
+ "hsr_ptp_tx";
+ /* Filled in by bootloader */
+ local-mac-address = [00 00 00 00 00 00];
+ };
+
+ pruss_emac1: ethernet-port@1 {
+ reg = <1>;
+ phy-handle = <&pruss_eth1_phy>;
+ phy-mode = "mii";
+ interrupts = <21 3 3>, <27 9 7>, <24 9 7>;
+ interrupt-names = "rx", "emac_ptp_tx",
+ "hsr_ptp_tx";
+ /* Filled in by bootloader */
+ local-mac-address = [00 00 00 00 00 00];
+ };
+ };
+ };
+};
+
+&am33xx_pinmux {
+ /* MDIO node for PRU-ICSS */
+ pruss_mdio_default: pruss_mdio_default {
+ pinctrl-single,pins = <
+ /* gpmc_clk.pr1_mdio_mdclk */
+ AM33XX_PADCONF(0x88c, PIN_OUTPUT, MUX_MODE5)
+ /* gpmc_csn3.pr1_mdio_data */
+ AM33XX_PADCONF(0x888, PIN_INPUT, MUX_MODE5)
+ /* gpmc_ben0_cle.gpio2_5 */
+ AM33XX_PADCONF(0x89c, PIN_INPUT_PULLUP, MUX_MODE7)
+ /* disable CPSW MDIO */
+ /* mdio_data.gpio0_0 */
+ AM33XX_PADCONF(0x948, PIN_INPUT_PULLUP, MUX_MODE7)
+ /* mdio_clk.gpio0_1 */
+ AM33XX_PADCONF(0x94c, PIN_INPUT_PULLUP, MUX_MODE7)
+ >;
+ };
+
+ /* Pinmux configuration for PRU-ICSS */
+ pruss_eth_default: pruss_eth_default {
+ pinctrl-single,pins = <
+ /* dss_data0.pr1_mii_mt0_clk */
+ AM33XX_PADCONF(0x8a0, PIN_INPUT, MUX_MODE2)
+ /* dss_data5.pr1_mii0_txd0 */
+ AM33XX_PADCONF(0x8b4, PIN_OUTPUT, MUX_MODE2)
+ /* dss_data4.pr1_mii0_txd1 */
+ AM33XX_PADCONF(0x8b0, PIN_OUTPUT, MUX_MODE2)
+ /* dss_data3.pr1_mii0_txd2 */
+ AM33XX_PADCONF(0x8ac, PIN_OUTPUT, MUX_MODE2)
+ /* dss_data2.pr1_mii0_txd3 */
+ AM33XX_PADCONF(0x8a8, PIN_OUTPUT, MUX_MODE2)
+ /* dss_data11.pr1_mii0_rxd0 */
+ AM33XX_PADCONF(0x8cc, PIN_INPUT, MUX_MODE5)
+ /* dss_data10.pr1_mii0_rxd1 */
+ AM33XX_PADCONF(0x8c8, PIN_INPUT, MUX_MODE5)
+ /* dss_data9.pr1_mii0_rxd2 */
+ AM33XX_PADCONF(0x8c4, PIN_INPUT, MUX_MODE5)
+ /* dss_data8.pr1_mii0_rxd3 */
+ AM33XX_PADCONF(0x8c0, PIN_INPUT, MUX_MODE5)
+ /* dss_data1.pr1_mii0_txen */
+ AM33XX_PADCONF(0x8a4, PIN_OUTPUT, MUX_MODE2)
+ /* dss_data14.pr1_mii_mr0_clk */
+ AM33XX_PADCONF(0x8d8, PIN_INPUT, MUX_MODE5)
+ /* dss_data15.pr1_mii0_rxdv */
+ AM33XX_PADCONF(0x8dc, PIN_INPUT, MUX_MODE5)
+ /* dss_data13.pr1_mii0_rxer */
+ AM33XX_PADCONF(0x8d4, PIN_INPUT, MUX_MODE5)
+ /* dss_data12.pr1_mii0_rxlink */
+ AM33XX_PADCONF(0x8d0, PIN_INPUT, MUX_MODE5)
+ /* dss_pclk.pr1_mii0_crs */
+ AM33XX_PADCONF(0x8e8, PIN_INPUT, MUX_MODE2)
+
+ /* gpmc_a0.pr1_mii_mt1_clk */
+ AM33XX_PADCONF(0x840, PIN_INPUT, MUX_MODE5)
+ /* gpmc_a4.pr1_mii1_txd0 */
+ AM33XX_PADCONF(0x850, PIN_OUTPUT, MUX_MODE5)
+ /* gpmc_a3.pr1_mii1_txd1 */
+ AM33XX_PADCONF(0x84c, PIN_OUTPUT, MUX_MODE5)
+ /* gpmc_a2.pr1_mii1_txd2 */
+ AM33XX_PADCONF(0x848, PIN_OUTPUT, MUX_MODE5)
+ /* gpmc_a1.pr1_mii1_txd3 */
+ AM33XX_PADCONF(0x844, PIN_OUTPUT, MUX_MODE5)
+ /* gpmc_a8.pr1_mii1_rxd0 */
+ AM33XX_PADCONF(0x860, PIN_INPUT, MUX_MODE5)
+ /* gpmc_a7.pr1_mii1_rxd1 */
+ AM33XX_PADCONF(0x85c, PIN_INPUT, MUX_MODE5)
+ /* gpmc_a6.pr1_mii1_rxd2 */
+ AM33XX_PADCONF(0x858, PIN_INPUT, MUX_MODE5)
+ /* gpmc_a5.pr1_mii1_rxd3 */
+ AM33XX_PADCONF(0x854, PIN_INPUT, MUX_MODE5)
+ /* gpmc_wpn.pr1_mii1_txen */
+ AM33XX_PADCONF(0x874, PIN_OUTPUT, MUX_MODE5)
+ /* gpmc_a9.pr1_mii_mr1_clk */
+ AM33XX_PADCONF(0x864, PIN_INPUT, MUX_MODE5)
+ /* gpmc_a10.pr1_mii1_rxdv */
+ AM33XX_PADCONF(0x868, PIN_INPUT, MUX_MODE5)
+ /* gpmc_a11.pr1_mii1_rxer */
+ AM33XX_PADCONF(0x86c, PIN_INPUT, MUX_MODE5)
+ /* gpmc_ben1.pr1_mii1_rxlink */
+ AM33XX_PADCONF(0x878, PIN_INPUT, MUX_MODE5)
+ /* lcd_ac_bias_en.pr1_mii1_crs */
+ AM33XX_PADCONF(0x8ec, PIN_INPUT, MUX_MODE2)
+ /* gpmc_wait0.pr1_mii1_col */
+ AM33XX_PADCONF(0x870, PIN_INPUT, MUX_MODE5)
+ >;
+ };
+};
+
+&gpio3 {
+ mux-mii-hog {
+ /* ETH1 mux: Low for MII-PRU, high for RMII-CPSW */
+ output-low;
+ };
+};
+
+/*
+ * Disable CPSW switch node and
+ * MDIO configuration to prevent
+ * conflict with PRU-ICSS
+ */
+&mac_sw {
+ status = "disable";
+};
+
+&davinci_mdio_sw {
+ status = "disable";
+};
+
+/* PRU-ICSS MDIO configuration */
+&pruss_mdio {
+ pinctrl-0 = <&pruss_mdio_default>;
+ pinctrl-names = "default";
+ reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
+ reset-delay-us = <2>; /* PHY datasheet states 1uS min */
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pruss_eth0_phy: ethernet-phy@1 {
+ reg = <1>;
+ };
+
+ pruss_eth1_phy: ethernet-phy@3 {
+ reg = <3>;
+ };
+};
diff --git a/arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi b/arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi
index 89d16fcc773e..a63ef307d918 100644
--- a/arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi
+++ b/arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi
@@ -896,6 +896,17 @@ pruss_mii_rt: mii-rt@32000 {
reg = <0x32000 0x58>;
};
+ pruss_iep: iep@2e000 {
+ compatible = "ti,am3356-icss-iep";
+ reg = <0x2e000 0x31c>;
+ clocks = <&pruss_iepclk_mux>;
+ };
+
+ pruss_ecap: ecap@30000 {
+ compatible = "ti,pruss-ecap";
+ reg = <0x30000 0x60>;
+ };
+
pruss_intc: interrupt-controller@20000 {
compatible = "ti,pruss-intc";
reg = <0x20000 0x2000>;
diff --git a/arch/arm/boot/dts/ti/omap/am4372.dtsi b/arch/arm/boot/dts/ti/omap/am4372.dtsi
index 504fa6b57d39..494f251c8e6a 100644
--- a/arch/arm/boot/dts/ti/omap/am4372.dtsi
+++ b/arch/arm/boot/dts/ti/omap/am4372.dtsi
@@ -476,6 +476,17 @@ pruss1_mii_rt: mii-rt@32000 {
reg = <0x32000 0x58>;
};
+ pruss1_iep: iep@2e000 {
+ compatible = "ti,am4376-icss-iep";
+ reg = <0x2e000 0x31c>;
+ clocks = <&pruss1_iepclk_mux>;
+ };
+
+ pruss1_ecap: ecap@30000 {
+ compatible = "ti,pruss-ecap";
+ reg = <0x30000 0x60>;
+ };
+
pruss1_intc: interrupt-controller@20000 {
compatible = "ti,pruss-intc";
reg = <0x20000 0x2000>;
diff --git a/arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts b/arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts
index 826f687c368a..3d755d875a70 100644
--- a/arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts
+++ b/arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts
@@ -168,6 +168,48 @@ led-out7 {
default-state = "off";
};
};
+
+ /* Dual-MAC Ethernet application node on PRU-ICSS1 */
+ pruss1_eth: pruss1-eth {
+ compatible = "ti,am4376-prueth";
+ ti,prus = <&pru1_0>, <&pru1_1>;
+ sram = <&ocmcram>;
+ ti,mii-rt = <&pruss1_mii_rt>;
+ ti,iep = <&pruss1_iep>;
+ ti,ecap = <&pruss1_ecap>;
+ interrupts = <20 2 2>, <21 3 3>;
+ interrupt-names = "rx_hp", "rx_lp";
+ interrupt-parent = <&pruss1_intc>;
+
+ pinctrl-0 = <&pruss1_eth_default>;
+ pinctrl-names = "default";
+
+ ethernet-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pruss1_emac0: ethernet-port@0 {
+ reg = <0>;
+ phy-handle = <&pruss1_eth0_phy>;
+ phy-mode = "mii";
+ interrupts = <20 2 2>, <26 6 6>, <23 6 6>;
+ interrupt-names = "rx", "emac_ptp_tx",
+ "hsr_ptp_tx";
+ /* Filled in by bootloader */
+ local-mac-address = [00 00 00 00 00 00];
+ };
+
+ pruss1_emac1: ethernet-port@1 {
+ reg = <1>;
+ phy-handle = <&pruss1_eth1_phy>;
+ phy-mode = "mii";
+ interrupts = <21 3 3>, <27 9 5>, <24 9 5>;
+ interrupt-names = "rx", "emac_ptp_tx",
+ "hsr_ptp_tx";
+ /* Filled in by bootloader */
+ local-mac-address = [00 00 00 00 00 00];
+ };
+ };
+ };
};
&am43xx_pinmux {
@@ -303,6 +345,86 @@ AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
+ pruss1_mdio_default: pruss1_mdio_default {
+ pinctrl-single,pins = <
+ /* gpmc_clk.pr1_mdio_mdclk */
+ AM4372_IOPAD(0x88c, (PIN_OUTPUT | MUX_MODE5))
+ /* xdma_event_intr0.pr1_mdio_data */
+ AM4372_IOPAD(0xa70, (PIN_INPUT | MUX_MODE8))
+ /* cam1_data6.gpio4_20 */
+ AM4372_IOPAD(0xa00, (PIN_INPUT_PULLUP | MUX_MODE7))
+ >;
+ };
+
+ pruss1_eth_default: pruss1_eth_default {
+ pinctrl-single,pins = <
+ /* dss_data0.pr1_mii_mt0_clk */
+ AM4372_IOPAD(0x8a0, (PIN_INPUT | MUX_MODE2))
+ /* dss_data5.pr1_mii0_txd0 */
+ AM4372_IOPAD(0x8b4, (PIN_OUTPUT | MUX_MODE2))
+ /* dss_data4.pr1_mii0_txd1 */
+ AM4372_IOPAD(0x8b0, (PIN_OUTPUT | MUX_MODE2))
+ /* dss_data3.pr1_mii0_txd2 */
+ AM4372_IOPAD(0x8ac, (PIN_OUTPUT | MUX_MODE2))
+ /* dss_data2.pr1_mii0_txd3 */
+ AM4372_IOPAD(0x8a8, (PIN_OUTPUT | MUX_MODE2))
+ /* dss_data11.pr1_mii0_rxd0 */
+ AM4372_IOPAD(0x8cc, (PIN_INPUT | MUX_MODE5))
+ /* dss_data10.pr1_mii0_rxd1 */
+ AM4372_IOPAD(0x8c8, (PIN_INPUT | MUX_MODE5))
+ /* dss_data9.pr1_mii0_rxd2 */
+ AM4372_IOPAD(0x8c4, (PIN_INPUT | MUX_MODE5))
+ /* dss_data8.pr1_mii0_rxd3 */
+ AM4372_IOPAD(0x8c0, (PIN_INPUT | MUX_MODE5))
+ /* dss_data1.pr1_mii0_txen */
+ AM4372_IOPAD(0x8a4, (PIN_OUTPUT | MUX_MODE2))
+ /* dss_data14.pr1_mii_mr0_clk */
+ AM4372_IOPAD(0x8d8, (PIN_INPUT | MUX_MODE5))
+ /* dss_data15.pr1_mii0_rxdv */
+ AM4372_IOPAD(0x8dc, (PIN_INPUT | MUX_MODE5))
+ /* dss_data13.pr1_mii0_rxer */
+ AM4372_IOPAD(0x8d4, (PIN_INPUT | MUX_MODE5))
+ /* dss_data12.pr1_mii0_rxlink */
+ AM4372_IOPAD(0x8d0, (PIN_INPUT | MUX_MODE5))
+ /* gpio5_10.pr1_mii0_crs */
+ AM4372_IOPAD(0xa40, (PIN_INPUT | MUX_MODE5))
+ /* gpio5_8.pr1_mii0_col */
+ AM4372_IOPAD(0xa38, (PIN_INPUT | MUX_MODE5))
+ /* gpmc_a6.pr1_mii_mt1_clk */
+ AM4372_IOPAD(0x858, (PIN_INPUT | MUX_MODE5))
+ /* gpmc_a5.pr1_mii1_txd0 */
+ AM4372_IOPAD(0x854, (PIN_OUTPUT | MUX_MODE5))
+ /* gpmc_a4.pr1_mii1_txd1 */
+ AM4372_IOPAD(0x850, (PIN_OUTPUT | MUX_MODE5))
+ /* gpmc_a3.pr1_mii1_txd2 */
+ AM4372_IOPAD(0x84c, (PIN_OUTPUT | MUX_MODE5))
+ /* gpmc_a2.pr1_mii1_txd3 */
+ AM4372_IOPAD(0x848, (PIN_OUTPUT | MUX_MODE5))
+ /* gpmc_a11.pr1_mii1_rxd0 */
+ AM4372_IOPAD(0x86c, (PIN_INPUT | MUX_MODE5))
+ /* gpmc_a10.pr1_mii1_rxd1 */
+ AM4372_IOPAD(0x868, (PIN_INPUT | MUX_MODE5))
+ /* gpmc_a9.pr1_mii1_rxd2 */
+ AM4372_IOPAD(0x864, (PIN_INPUT | MUX_MODE5))
+ /* gpmc_a8.pr1_mii1_rxd3 */
+ AM4372_IOPAD(0x860, (PIN_INPUT | MUX_MODE5))
+ /* gpmc_a0.pr1_mii1_txen */
+ AM4372_IOPAD(0x840, (PIN_OUTPUT | MUX_MODE5))
+ /* gpmc_a7.pr1_mii_mr1_clk */
+ AM4372_IOPAD(0x85c, (PIN_INPUT | MUX_MODE5))
+ /* gpmc_a1.pr1_mii1_rxdv */
+ AM4372_IOPAD(0x844, (PIN_INPUT | MUX_MODE5))
+ /* gpmc_wpn.pr1_mii1_rxer */
+ AM4372_IOPAD(0x874, (PIN_INPUT | MUX_MODE5))
+ /* gpio5_13.pr1_mii1_rxlink */
+ AM4372_IOPAD(0xa4c, (PIN_INPUT | MUX_MODE5))
+ /* gpio5_11.pr1_mii1_crs */
+ AM4372_IOPAD(0xa44, (PIN_INPUT | MUX_MODE5))
+ /* gpmc_be1n.pr1_mii1_col */
+ AM4372_IOPAD(0x878, (PIN_INPUT | MUX_MODE5))
+ >;
+ };
+
qspi_pins_default: qspi-default-pins {
pinctrl-single,pins = <
AM4372_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_csn0.qspi_csn */
@@ -539,5 +661,18 @@ opp-100-600000000 {
};
&pruss1_mdio {
- status = "disabled";
+ pinctrl-0 = <&pruss1_mdio_default>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ reset-gpios = <&gpio4 20 GPIO_ACTIVE_LOW>;
+ reset-delay-us = <2>; /* PHY datasheet states 1uS min */
+
+ pruss1_eth0_phy: ethernet-phy@0 {
+ reg = <0>;
+ };
+
+ pruss1_eth1_phy: ethernet-phy@1 {
+ reg = <1>;
+ };
};
--
2.43.0
On 1/5/26 10:21 AM, Parvathi Pudi wrote:
> From: Roger Quadros <rogerq@ti.com>
>
> PRU-ICSS instance consists of two PRU cores along with various
> peripherals such as the Interrupt Controller (PRU_INTC), the Industrial
> Ethernet Peripheral(IEP), the Real Time Media Independent Interface
> controller (MII_RT), and the Enhanced Capture (eCAP) event module.
>
> The TI Sitara AM335x ICE-V2 consists of single PRU-ICSS instance,
> This patch adds the new device tree overlay file in-order to enable
> PRU-ICSS instance, along with makefile changes.
>
> The TI Sitara AM437x series of devices consists of 2 PRU-ICSS instances
> (PRU-ICSS0 and PRU-ICSS1). This patch adds the device tree nodes for the
> PRU-ICSS1 instance to support DUAL-MAC mode of operation. Support for
> Ethernet over PRU is available only for ICSS1 instance.
>
> am33xx-l4.dtsi, am4372.dtsi - Adds IEP and eCAP peripheral as child nodes
> of the PRUSS subsystem node.
>
> am335x-icev2-prueth.dtso, am437x-idk-evm.dts - Adds PRU-ICSS
> instance node along with PRU eth port information and corresponding
> port configuration. It includes interrupt mapping for packet reception,
> HW timestamp collection, and PRU Ethernet ports in MII mode,
>
> GPIO configuration, boot strapping along with delay configuration for
> individual PRU Ethernet port and other required nodes.
>
> Signed-off-by: Roger Quadros <rogerq@ti.com>
> Signed-off-by: Andrew F. Davis <afd@ti.com>
> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
> Signed-off-by: Basharath Hussain Khaja <basharath@couthit.com>
> Signed-off-by: Parvathi Pudi <parvathi@couthit.com>
> ---
> arch/arm/boot/dts/ti/omap/Makefile | 5 +
> .../ti/omap/am335x-icev2-prueth-overlay.dtso | 190 ++++++++++++++++++
> arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi | 11 +
> arch/arm/boot/dts/ti/omap/am4372.dtsi | 11 +
> arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts | 137 ++++++++++++-
> 5 files changed, 353 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/boot/dts/ti/omap/am335x-icev2-prueth-overlay.dtso
>
> diff --git a/arch/arm/boot/dts/ti/omap/Makefile b/arch/arm/boot/dts/ti/omap/Makefile
> index 14e500846875..c68948035eca 100644
> --- a/arch/arm/boot/dts/ti/omap/Makefile
> +++ b/arch/arm/boot/dts/ti/omap/Makefile
> @@ -82,6 +82,10 @@ dtb-$(CONFIG_ARCH_OMAP4) += \
> omap4-var-stk-om44.dtb \
> omap4-xyboard-mz609.dtb \
> omap4-xyboard-mz617.dtb
> +
> +am335x-icev2-prueth-dtbs := am335x-icev2.dtb \
> + am335x-icev2-prueth-overlay.dtbo
> +
> dtb-$(CONFIG_SOC_AM33XX) += \
> am335x-baltos-ir2110.dtb \
> am335x-baltos-ir3220.dtb \
> @@ -100,6 +104,7 @@ dtb-$(CONFIG_SOC_AM33XX) += \
> am335x-evmsk.dtb \
> am335x-guardian.dtb \
> am335x-icev2.dtb \
> + am335x-icev2-prueth.dtb \
> am335x-lxm.dtb \
> am335x-mba335x.dtb \
> am335x-moxa-uc-2101.dtb \
> diff --git a/arch/arm/boot/dts/ti/omap/am335x-icev2-prueth-overlay.dtso b/arch/arm/boot/dts/ti/omap/am335x-icev2-prueth-overlay.dtso
> new file mode 100644
> index 000000000000..abde5119875f
> --- /dev/null
> +++ b/arch/arm/boot/dts/ti/omap/am335x-icev2-prueth-overlay.dtso
> @@ -0,0 +1,190 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * DT overlay for IDK AM335x
> + *
> + * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
> + */
> +
> +/*
> + * AM335x ICE V2 board
> + * http://www.ti.com/tool/tmdsice3359
> + */
> +
> +/dts-v1/;
> +/plugin/;
> +
> +#include <dt-bindings/bus/ti-sysc.h>
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/pinctrl/am33xx.h>
> +#include <dt-bindings/clock/am3.h>
> +
> +&{/} {
> + /* Dual-MAC Ethernet application node on PRU-ICSS */
> + pruss_eth: pruss-eth {
> + compatible = "ti,am3359-prueth";
> + ti,prus = <&pru0>, <&pru1>;
> + sram = <&ocmcram>;
> + ti,mii-rt = <&pruss_mii_rt>;
> + ti,iep = <&pruss_iep>;
> + ti,ecap = <&pruss_ecap>;
> + interrupts = <20 2 2>, <21 3 3>;
> + interrupt-names = "rx_hp", "rx_lp";
> + interrupt-parent = <&pruss_intc>;
> +
> + pinctrl-0 = <&pruss_eth_default>;
> + pinctrl-names = "default";
> +
> + ethernet-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + pruss_emac0: ethernet-port@0 {
> + reg = <0>;
> + phy-handle = <&pruss_eth0_phy>;
> + phy-mode = "mii";
> + interrupts = <20 2 2>, <26 6 6>, <23 6 6>;
> + interrupt-names = "rx", "emac_ptp_tx",
> + "hsr_ptp_tx";
> + /* Filled in by bootloader */
> + local-mac-address = [00 00 00 00 00 00];
> + };
> +
> + pruss_emac1: ethernet-port@1 {
> + reg = <1>;
> + phy-handle = <&pruss_eth1_phy>;
> + phy-mode = "mii";
> + interrupts = <21 3 3>, <27 9 7>, <24 9 7>;
> + interrupt-names = "rx", "emac_ptp_tx",
> + "hsr_ptp_tx";
> + /* Filled in by bootloader */
> + local-mac-address = [00 00 00 00 00 00];
> + };
> + };
> + };
> +};
> +
> +&am33xx_pinmux {
> + /* MDIO node for PRU-ICSS */
> + pruss_mdio_default: pruss_mdio_default {
> + pinctrl-single,pins = <
> + /* gpmc_clk.pr1_mdio_mdclk */
> + AM33XX_PADCONF(0x88c, PIN_OUTPUT, MUX_MODE5)
> + /* gpmc_csn3.pr1_mdio_data */
> + AM33XX_PADCONF(0x888, PIN_INPUT, MUX_MODE5)
Have you regenerated this list lately? The pinmux tool usually puts the
comment after the PADCONF entry. It also now also shows the pin number
in the comment which is nice:
AM33XX_IOPAD(0x88c, PIN_OUTPUT, MUX_MODE5) /* (V12) gpmc_clk.pr1_mdio_mdclk */
AM33XX_IOPAD(0x888, PIN_INPUT, MUX_MODE5) /* (T13) gpmc_csn3.pr1_mdio_data */
I'd recommend regenerating these nodes to match the latest pinmux tool output.
> + /* gpmc_ben0_cle.gpio2_5 */
> + AM33XX_PADCONF(0x89c, PIN_INPUT_PULLUP, MUX_MODE7)
> + /* disable CPSW MDIO */
Is this needed? If you disable the CPSW MDIO node the pinmux should be unset,
so not sure why you are muxing these to GPIO pins.
Also, this patch is a bit busy, might be easier to review if you split it
into one for AM335x and one for AM437x changes.
Andrew
> + /* mdio_data.gpio0_0 */
> + AM33XX_PADCONF(0x948, PIN_INPUT_PULLUP, MUX_MODE7)
> + /* mdio_clk.gpio0_1 */
> + AM33XX_PADCONF(0x94c, PIN_INPUT_PULLUP, MUX_MODE7)
> + >;
> + };
> +
> + /* Pinmux configuration for PRU-ICSS */
> + pruss_eth_default: pruss_eth_default {
> + pinctrl-single,pins = <
> + /* dss_data0.pr1_mii_mt0_clk */
> + AM33XX_PADCONF(0x8a0, PIN_INPUT, MUX_MODE2)
> + /* dss_data5.pr1_mii0_txd0 */
> + AM33XX_PADCONF(0x8b4, PIN_OUTPUT, MUX_MODE2)
> + /* dss_data4.pr1_mii0_txd1 */
> + AM33XX_PADCONF(0x8b0, PIN_OUTPUT, MUX_MODE2)
> + /* dss_data3.pr1_mii0_txd2 */
> + AM33XX_PADCONF(0x8ac, PIN_OUTPUT, MUX_MODE2)
> + /* dss_data2.pr1_mii0_txd3 */
> + AM33XX_PADCONF(0x8a8, PIN_OUTPUT, MUX_MODE2)
> + /* dss_data11.pr1_mii0_rxd0 */
> + AM33XX_PADCONF(0x8cc, PIN_INPUT, MUX_MODE5)
> + /* dss_data10.pr1_mii0_rxd1 */
> + AM33XX_PADCONF(0x8c8, PIN_INPUT, MUX_MODE5)
> + /* dss_data9.pr1_mii0_rxd2 */
> + AM33XX_PADCONF(0x8c4, PIN_INPUT, MUX_MODE5)
> + /* dss_data8.pr1_mii0_rxd3 */
> + AM33XX_PADCONF(0x8c0, PIN_INPUT, MUX_MODE5)
> + /* dss_data1.pr1_mii0_txen */
> + AM33XX_PADCONF(0x8a4, PIN_OUTPUT, MUX_MODE2)
> + /* dss_data14.pr1_mii_mr0_clk */
> + AM33XX_PADCONF(0x8d8, PIN_INPUT, MUX_MODE5)
> + /* dss_data15.pr1_mii0_rxdv */
> + AM33XX_PADCONF(0x8dc, PIN_INPUT, MUX_MODE5)
> + /* dss_data13.pr1_mii0_rxer */
> + AM33XX_PADCONF(0x8d4, PIN_INPUT, MUX_MODE5)
> + /* dss_data12.pr1_mii0_rxlink */
> + AM33XX_PADCONF(0x8d0, PIN_INPUT, MUX_MODE5)
> + /* dss_pclk.pr1_mii0_crs */
> + AM33XX_PADCONF(0x8e8, PIN_INPUT, MUX_MODE2)
> +
> + /* gpmc_a0.pr1_mii_mt1_clk */
> + AM33XX_PADCONF(0x840, PIN_INPUT, MUX_MODE5)
> + /* gpmc_a4.pr1_mii1_txd0 */
> + AM33XX_PADCONF(0x850, PIN_OUTPUT, MUX_MODE5)
> + /* gpmc_a3.pr1_mii1_txd1 */
> + AM33XX_PADCONF(0x84c, PIN_OUTPUT, MUX_MODE5)
> + /* gpmc_a2.pr1_mii1_txd2 */
> + AM33XX_PADCONF(0x848, PIN_OUTPUT, MUX_MODE5)
> + /* gpmc_a1.pr1_mii1_txd3 */
> + AM33XX_PADCONF(0x844, PIN_OUTPUT, MUX_MODE5)
> + /* gpmc_a8.pr1_mii1_rxd0 */
> + AM33XX_PADCONF(0x860, PIN_INPUT, MUX_MODE5)
> + /* gpmc_a7.pr1_mii1_rxd1 */
> + AM33XX_PADCONF(0x85c, PIN_INPUT, MUX_MODE5)
> + /* gpmc_a6.pr1_mii1_rxd2 */
> + AM33XX_PADCONF(0x858, PIN_INPUT, MUX_MODE5)
> + /* gpmc_a5.pr1_mii1_rxd3 */
> + AM33XX_PADCONF(0x854, PIN_INPUT, MUX_MODE5)
> + /* gpmc_wpn.pr1_mii1_txen */
> + AM33XX_PADCONF(0x874, PIN_OUTPUT, MUX_MODE5)
> + /* gpmc_a9.pr1_mii_mr1_clk */
> + AM33XX_PADCONF(0x864, PIN_INPUT, MUX_MODE5)
> + /* gpmc_a10.pr1_mii1_rxdv */
> + AM33XX_PADCONF(0x868, PIN_INPUT, MUX_MODE5)
> + /* gpmc_a11.pr1_mii1_rxer */
> + AM33XX_PADCONF(0x86c, PIN_INPUT, MUX_MODE5)
> + /* gpmc_ben1.pr1_mii1_rxlink */
> + AM33XX_PADCONF(0x878, PIN_INPUT, MUX_MODE5)
> + /* lcd_ac_bias_en.pr1_mii1_crs */
> + AM33XX_PADCONF(0x8ec, PIN_INPUT, MUX_MODE2)
> + /* gpmc_wait0.pr1_mii1_col */
> + AM33XX_PADCONF(0x870, PIN_INPUT, MUX_MODE5)
> + >;
> + };
> +};
> +
> +&gpio3 {
> + mux-mii-hog {
> + /* ETH1 mux: Low for MII-PRU, high for RMII-CPSW */
> + output-low;
> + };
> +};
> +
> +/*
> + * Disable CPSW switch node and
> + * MDIO configuration to prevent
> + * conflict with PRU-ICSS
> + */
> +&mac_sw {
> + status = "disable";
> +};
> +
> +&davinci_mdio_sw {
> + status = "disable";
> +};
> +
> +/* PRU-ICSS MDIO configuration */
> +&pruss_mdio {
> + pinctrl-0 = <&pruss_mdio_default>;
> + pinctrl-names = "default";
> + reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
> + reset-delay-us = <2>; /* PHY datasheet states 1uS min */
> + status = "okay";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + pruss_eth0_phy: ethernet-phy@1 {
> + reg = <1>;
> + };
> +
> + pruss_eth1_phy: ethernet-phy@3 {
> + reg = <3>;
> + };
> +};
> diff --git a/arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi b/arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi
> index 89d16fcc773e..a63ef307d918 100644
> --- a/arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi
> +++ b/arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi
> @@ -896,6 +896,17 @@ pruss_mii_rt: mii-rt@32000 {
> reg = <0x32000 0x58>;
> };
>
> + pruss_iep: iep@2e000 {
> + compatible = "ti,am3356-icss-iep";
> + reg = <0x2e000 0x31c>;
> + clocks = <&pruss_iepclk_mux>;
> + };
> +
> + pruss_ecap: ecap@30000 {
> + compatible = "ti,pruss-ecap";
> + reg = <0x30000 0x60>;
> + };
> +
> pruss_intc: interrupt-controller@20000 {
> compatible = "ti,pruss-intc";
> reg = <0x20000 0x2000>;
> diff --git a/arch/arm/boot/dts/ti/omap/am4372.dtsi b/arch/arm/boot/dts/ti/omap/am4372.dtsi
> index 504fa6b57d39..494f251c8e6a 100644
> --- a/arch/arm/boot/dts/ti/omap/am4372.dtsi
> +++ b/arch/arm/boot/dts/ti/omap/am4372.dtsi
> @@ -476,6 +476,17 @@ pruss1_mii_rt: mii-rt@32000 {
> reg = <0x32000 0x58>;
> };
>
> + pruss1_iep: iep@2e000 {
> + compatible = "ti,am4376-icss-iep";
> + reg = <0x2e000 0x31c>;
> + clocks = <&pruss1_iepclk_mux>;
> + };
> +
> + pruss1_ecap: ecap@30000 {
> + compatible = "ti,pruss-ecap";
> + reg = <0x30000 0x60>;
> + };
> +
> pruss1_intc: interrupt-controller@20000 {
> compatible = "ti,pruss-intc";
> reg = <0x20000 0x2000>;
> diff --git a/arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts b/arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts
> index 826f687c368a..3d755d875a70 100644
> --- a/arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts
> +++ b/arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts
> @@ -168,6 +168,48 @@ led-out7 {
> default-state = "off";
> };
> };
> +
> + /* Dual-MAC Ethernet application node on PRU-ICSS1 */
> + pruss1_eth: pruss1-eth {
> + compatible = "ti,am4376-prueth";
> + ti,prus = <&pru1_0>, <&pru1_1>;
> + sram = <&ocmcram>;
> + ti,mii-rt = <&pruss1_mii_rt>;
> + ti,iep = <&pruss1_iep>;
> + ti,ecap = <&pruss1_ecap>;
> + interrupts = <20 2 2>, <21 3 3>;
> + interrupt-names = "rx_hp", "rx_lp";
> + interrupt-parent = <&pruss1_intc>;
> +
> + pinctrl-0 = <&pruss1_eth_default>;
> + pinctrl-names = "default";
> +
> + ethernet-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + pruss1_emac0: ethernet-port@0 {
> + reg = <0>;
> + phy-handle = <&pruss1_eth0_phy>;
> + phy-mode = "mii";
> + interrupts = <20 2 2>, <26 6 6>, <23 6 6>;
> + interrupt-names = "rx", "emac_ptp_tx",
> + "hsr_ptp_tx";
> + /* Filled in by bootloader */
> + local-mac-address = [00 00 00 00 00 00];
> + };
> +
> + pruss1_emac1: ethernet-port@1 {
> + reg = <1>;
> + phy-handle = <&pruss1_eth1_phy>;
> + phy-mode = "mii";
> + interrupts = <21 3 3>, <27 9 5>, <24 9 5>;
> + interrupt-names = "rx", "emac_ptp_tx",
> + "hsr_ptp_tx";
> + /* Filled in by bootloader */
> + local-mac-address = [00 00 00 00 00 00];
> + };
> + };
> + };
> };
>
> &am43xx_pinmux {
> @@ -303,6 +345,86 @@ AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
> >;
> };
>
> + pruss1_mdio_default: pruss1_mdio_default {
> + pinctrl-single,pins = <
> + /* gpmc_clk.pr1_mdio_mdclk */
> + AM4372_IOPAD(0x88c, (PIN_OUTPUT | MUX_MODE5))
> + /* xdma_event_intr0.pr1_mdio_data */
> + AM4372_IOPAD(0xa70, (PIN_INPUT | MUX_MODE8))
> + /* cam1_data6.gpio4_20 */
> + AM4372_IOPAD(0xa00, (PIN_INPUT_PULLUP | MUX_MODE7))
> + >;
> + };
> +
> + pruss1_eth_default: pruss1_eth_default {
> + pinctrl-single,pins = <
> + /* dss_data0.pr1_mii_mt0_clk */
> + AM4372_IOPAD(0x8a0, (PIN_INPUT | MUX_MODE2))
> + /* dss_data5.pr1_mii0_txd0 */
> + AM4372_IOPAD(0x8b4, (PIN_OUTPUT | MUX_MODE2))
> + /* dss_data4.pr1_mii0_txd1 */
> + AM4372_IOPAD(0x8b0, (PIN_OUTPUT | MUX_MODE2))
> + /* dss_data3.pr1_mii0_txd2 */
> + AM4372_IOPAD(0x8ac, (PIN_OUTPUT | MUX_MODE2))
> + /* dss_data2.pr1_mii0_txd3 */
> + AM4372_IOPAD(0x8a8, (PIN_OUTPUT | MUX_MODE2))
> + /* dss_data11.pr1_mii0_rxd0 */
> + AM4372_IOPAD(0x8cc, (PIN_INPUT | MUX_MODE5))
> + /* dss_data10.pr1_mii0_rxd1 */
> + AM4372_IOPAD(0x8c8, (PIN_INPUT | MUX_MODE5))
> + /* dss_data9.pr1_mii0_rxd2 */
> + AM4372_IOPAD(0x8c4, (PIN_INPUT | MUX_MODE5))
> + /* dss_data8.pr1_mii0_rxd3 */
> + AM4372_IOPAD(0x8c0, (PIN_INPUT | MUX_MODE5))
> + /* dss_data1.pr1_mii0_txen */
> + AM4372_IOPAD(0x8a4, (PIN_OUTPUT | MUX_MODE2))
> + /* dss_data14.pr1_mii_mr0_clk */
> + AM4372_IOPAD(0x8d8, (PIN_INPUT | MUX_MODE5))
> + /* dss_data15.pr1_mii0_rxdv */
> + AM4372_IOPAD(0x8dc, (PIN_INPUT | MUX_MODE5))
> + /* dss_data13.pr1_mii0_rxer */
> + AM4372_IOPAD(0x8d4, (PIN_INPUT | MUX_MODE5))
> + /* dss_data12.pr1_mii0_rxlink */
> + AM4372_IOPAD(0x8d0, (PIN_INPUT | MUX_MODE5))
> + /* gpio5_10.pr1_mii0_crs */
> + AM4372_IOPAD(0xa40, (PIN_INPUT | MUX_MODE5))
> + /* gpio5_8.pr1_mii0_col */
> + AM4372_IOPAD(0xa38, (PIN_INPUT | MUX_MODE5))
> + /* gpmc_a6.pr1_mii_mt1_clk */
> + AM4372_IOPAD(0x858, (PIN_INPUT | MUX_MODE5))
> + /* gpmc_a5.pr1_mii1_txd0 */
> + AM4372_IOPAD(0x854, (PIN_OUTPUT | MUX_MODE5))
> + /* gpmc_a4.pr1_mii1_txd1 */
> + AM4372_IOPAD(0x850, (PIN_OUTPUT | MUX_MODE5))
> + /* gpmc_a3.pr1_mii1_txd2 */
> + AM4372_IOPAD(0x84c, (PIN_OUTPUT | MUX_MODE5))
> + /* gpmc_a2.pr1_mii1_txd3 */
> + AM4372_IOPAD(0x848, (PIN_OUTPUT | MUX_MODE5))
> + /* gpmc_a11.pr1_mii1_rxd0 */
> + AM4372_IOPAD(0x86c, (PIN_INPUT | MUX_MODE5))
> + /* gpmc_a10.pr1_mii1_rxd1 */
> + AM4372_IOPAD(0x868, (PIN_INPUT | MUX_MODE5))
> + /* gpmc_a9.pr1_mii1_rxd2 */
> + AM4372_IOPAD(0x864, (PIN_INPUT | MUX_MODE5))
> + /* gpmc_a8.pr1_mii1_rxd3 */
> + AM4372_IOPAD(0x860, (PIN_INPUT | MUX_MODE5))
> + /* gpmc_a0.pr1_mii1_txen */
> + AM4372_IOPAD(0x840, (PIN_OUTPUT | MUX_MODE5))
> + /* gpmc_a7.pr1_mii_mr1_clk */
> + AM4372_IOPAD(0x85c, (PIN_INPUT | MUX_MODE5))
> + /* gpmc_a1.pr1_mii1_rxdv */
> + AM4372_IOPAD(0x844, (PIN_INPUT | MUX_MODE5))
> + /* gpmc_wpn.pr1_mii1_rxer */
> + AM4372_IOPAD(0x874, (PIN_INPUT | MUX_MODE5))
> + /* gpio5_13.pr1_mii1_rxlink */
> + AM4372_IOPAD(0xa4c, (PIN_INPUT | MUX_MODE5))
> + /* gpio5_11.pr1_mii1_crs */
> + AM4372_IOPAD(0xa44, (PIN_INPUT | MUX_MODE5))
> + /* gpmc_be1n.pr1_mii1_col */
> + AM4372_IOPAD(0x878, (PIN_INPUT | MUX_MODE5))
> + >;
> + };
> +
> qspi_pins_default: qspi-default-pins {
> pinctrl-single,pins = <
> AM4372_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_csn0.qspi_csn */
> @@ -539,5 +661,18 @@ opp-100-600000000 {
> };
>
> &pruss1_mdio {
> - status = "disabled";
> + pinctrl-0 = <&pruss1_mdio_default>;
> + pinctrl-names = "default";
> + status = "okay";
> +
> + reset-gpios = <&gpio4 20 GPIO_ACTIVE_LOW>;
> + reset-delay-us = <2>; /* PHY datasheet states 1uS min */
> +
> + pruss1_eth0_phy: ethernet-phy@0 {
> + reg = <0>;
> + };
> +
> + pruss1_eth1_phy: ethernet-phy@1 {
> + reg = <1>;
> + };
> };
Hi,
> On 1/5/26 10:21 AM, Parvathi Pudi wrote:
>> From: Roger Quadros <rogerq@ti.com>
>>
>> PRU-ICSS instance consists of two PRU cores along with various
>> peripherals such as the Interrupt Controller (PRU_INTC), the Industrial
>> Ethernet Peripheral(IEP), the Real Time Media Independent Interface
>> controller (MII_RT), and the Enhanced Capture (eCAP) event module.
>>
>> The TI Sitara AM335x ICE-V2 consists of single PRU-ICSS instance,
>> This patch adds the new device tree overlay file in-order to enable
>> PRU-ICSS instance, along with makefile changes.
>>
>> The TI Sitara AM437x series of devices consists of 2 PRU-ICSS instances
>> (PRU-ICSS0 and PRU-ICSS1). This patch adds the device tree nodes for the
>> PRU-ICSS1 instance to support DUAL-MAC mode of operation. Support for
>> Ethernet over PRU is available only for ICSS1 instance.
>>
>> am33xx-l4.dtsi, am4372.dtsi - Adds IEP and eCAP peripheral as child nodes
>> of the PRUSS subsystem node.
>>
>> am335x-icev2-prueth.dtso, am437x-idk-evm.dts - Adds PRU-ICSS
>> instance node along with PRU eth port information and corresponding
>> port configuration. It includes interrupt mapping for packet reception,
>> HW timestamp collection, and PRU Ethernet ports in MII mode,
>>
>> GPIO configuration, boot strapping along with delay configuration for
>> individual PRU Ethernet port and other required nodes.
>>
>> Signed-off-by: Roger Quadros <rogerq@ti.com>
>> Signed-off-by: Andrew F. Davis <afd@ti.com>
>> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
>> Signed-off-by: Basharath Hussain Khaja <basharath@couthit.com>
>> Signed-off-by: Parvathi Pudi <parvathi@couthit.com>
>> ---
>> arch/arm/boot/dts/ti/omap/Makefile | 5 +
>> .../ti/omap/am335x-icev2-prueth-overlay.dtso | 190 ++++++++++++++++++
>> arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi | 11 +
>> arch/arm/boot/dts/ti/omap/am4372.dtsi | 11 +
>> arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts | 137 ++++++++++++-
>> 5 files changed, 353 insertions(+), 1 deletion(-)
>> create mode 100644 arch/arm/boot/dts/ti/omap/am335x-icev2-prueth-overlay.dtso
>>
>> diff --git a/arch/arm/boot/dts/ti/omap/Makefile
>> b/arch/arm/boot/dts/ti/omap/Makefile
>> index 14e500846875..c68948035eca 100644
>> --- a/arch/arm/boot/dts/ti/omap/Makefile
>> +++ b/arch/arm/boot/dts/ti/omap/Makefile
>> @@ -82,6 +82,10 @@ dtb-$(CONFIG_ARCH_OMAP4) += \
>> omap4-var-stk-om44.dtb \
>> omap4-xyboard-mz609.dtb \
>> omap4-xyboard-mz617.dtb
>> +
>> +am335x-icev2-prueth-dtbs := am335x-icev2.dtb \
>> + am335x-icev2-prueth-overlay.dtbo
>> +
>> dtb-$(CONFIG_SOC_AM33XX) += \
>> am335x-baltos-ir2110.dtb \
>> am335x-baltos-ir3220.dtb \
>> @@ -100,6 +104,7 @@ dtb-$(CONFIG_SOC_AM33XX) += \
>> am335x-evmsk.dtb \
>> am335x-guardian.dtb \
>> am335x-icev2.dtb \
>> + am335x-icev2-prueth.dtb \
>> am335x-lxm.dtb \
>> am335x-mba335x.dtb \
>> am335x-moxa-uc-2101.dtb \
>> diff --git a/arch/arm/boot/dts/ti/omap/am335x-icev2-prueth-overlay.dtso
>> b/arch/arm/boot/dts/ti/omap/am335x-icev2-prueth-overlay.dtso
>> new file mode 100644
>> index 000000000000..abde5119875f
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/ti/omap/am335x-icev2-prueth-overlay.dtso
>> @@ -0,0 +1,190 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * DT overlay for IDK AM335x
>> + *
>> + * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
>> + */
>> +
>> +/*
>> + * AM335x ICE V2 board
>> + * http://www.ti.com/tool/tmdsice3359
>> + */
>> +
>> +/dts-v1/;
>> +/plugin/;
>> +
>> +#include <dt-bindings/bus/ti-sysc.h>
>> +#include <dt-bindings/gpio/gpio.h>
>> +#include <dt-bindings/pinctrl/am33xx.h>
>> +#include <dt-bindings/clock/am3.h>
>> +
>> +&{/} {
>> + /* Dual-MAC Ethernet application node on PRU-ICSS */
>> + pruss_eth: pruss-eth {
>> + compatible = "ti,am3359-prueth";
>> + ti,prus = <&pru0>, <&pru1>;
>> + sram = <&ocmcram>;
>> + ti,mii-rt = <&pruss_mii_rt>;
>> + ti,iep = <&pruss_iep>;
>> + ti,ecap = <&pruss_ecap>;
>> + interrupts = <20 2 2>, <21 3 3>;
>> + interrupt-names = "rx_hp", "rx_lp";
>> + interrupt-parent = <&pruss_intc>;
>> +
>> + pinctrl-0 = <&pruss_eth_default>;
>> + pinctrl-names = "default";
>> +
>> + ethernet-ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + pruss_emac0: ethernet-port@0 {
>> + reg = <0>;
>> + phy-handle = <&pruss_eth0_phy>;
>> + phy-mode = "mii";
>> + interrupts = <20 2 2>, <26 6 6>, <23 6 6>;
>> + interrupt-names = "rx", "emac_ptp_tx",
>> + "hsr_ptp_tx";
>> + /* Filled in by bootloader */
>> + local-mac-address = [00 00 00 00 00 00];
>> + };
>> +
>> + pruss_emac1: ethernet-port@1 {
>> + reg = <1>;
>> + phy-handle = <&pruss_eth1_phy>;
>> + phy-mode = "mii";
>> + interrupts = <21 3 3>, <27 9 7>, <24 9 7>;
>> + interrupt-names = "rx", "emac_ptp_tx",
>> + "hsr_ptp_tx";
>> + /* Filled in by bootloader */
>> + local-mac-address = [00 00 00 00 00 00];
>> + };
>> + };
>> + };
>> +};
>> +
>> +&am33xx_pinmux {
>> + /* MDIO node for PRU-ICSS */
>> + pruss_mdio_default: pruss_mdio_default {
>> + pinctrl-single,pins = <
>> + /* gpmc_clk.pr1_mdio_mdclk */
>> + AM33XX_PADCONF(0x88c, PIN_OUTPUT, MUX_MODE5)
>> + /* gpmc_csn3.pr1_mdio_data */
>> + AM33XX_PADCONF(0x888, PIN_INPUT, MUX_MODE5)
>
> Have you regenerated this list lately? The pinmux tool usually puts the
> comment after the PADCONF entry. It also now also shows the pin number
> in the comment which is nice:
>
> AM33XX_IOPAD(0x88c, PIN_OUTPUT, MUX_MODE5) /* (V12) gpmc_clk.pr1_mdio_mdclk */
> AM33XX_IOPAD(0x888, PIN_INPUT, MUX_MODE5) /* (T13) gpmc_csn3.pr1_mdio_data */
>
> I'd recommend regenerating these nodes to match the latest pinmux tool output.
>
Sure, we will check and regenerate these nodes using the pinmux tool and
update accordingly.
>> + /* gpmc_ben0_cle.gpio2_5 */
>> + AM33XX_PADCONF(0x89c, PIN_INPUT_PULLUP, MUX_MODE7)
>> + /* disable CPSW MDIO */
>
> Is this needed? If you disable the CPSW MDIO node the pinmux should be unset,
> so not sure why you are muxing these to GPIO pins.
>
We will review and get back with more details on this.
> Also, this patch is a bit busy, might be easier to review if you split it
> into one for AM335x and one for AM437x changes.
>
We will split the changes into two patches, one for AM335x
and one for AM437x, and address this in the next version.
Thanks and Regards,
Parvathi.
Hi,
> Hi,
>
>> On 1/5/26 10:21 AM, Parvathi Pudi wrote:
>>> From: Roger Quadros <rogerq@ti.com>
>>>
>>> PRU-ICSS instance consists of two PRU cores along with various
>>> peripherals such as the Interrupt Controller (PRU_INTC), the Industrial
>>> Ethernet Peripheral(IEP), the Real Time Media Independent Interface
>>> controller (MII_RT), and the Enhanced Capture (eCAP) event module.
>>>
>>> The TI Sitara AM335x ICE-V2 consists of single PRU-ICSS instance,
>>> This patch adds the new device tree overlay file in-order to enable
>>> PRU-ICSS instance, along with makefile changes.
>>>
>>> The TI Sitara AM437x series of devices consists of 2 PRU-ICSS instances
>>> (PRU-ICSS0 and PRU-ICSS1). This patch adds the device tree nodes for the
>>> PRU-ICSS1 instance to support DUAL-MAC mode of operation. Support for
>>> Ethernet over PRU is available only for ICSS1 instance.
>>>
>>> am33xx-l4.dtsi, am4372.dtsi - Adds IEP and eCAP peripheral as child nodes
>>> of the PRUSS subsystem node.
>>>
>>> am335x-icev2-prueth.dtso, am437x-idk-evm.dts - Adds PRU-ICSS
>>> instance node along with PRU eth port information and corresponding
>>> port configuration. It includes interrupt mapping for packet reception,
>>> HW timestamp collection, and PRU Ethernet ports in MII mode,
>>>
>>> GPIO configuration, boot strapping along with delay configuration for
>>> individual PRU Ethernet port and other required nodes.
>>>
>>> Signed-off-by: Roger Quadros <rogerq@ti.com>
>>> Signed-off-by: Andrew F. Davis <afd@ti.com>
>>> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
>>> Signed-off-by: Basharath Hussain Khaja <basharath@couthit.com>
>>> Signed-off-by: Parvathi Pudi <parvathi@couthit.com>
>>> ---
>>> arch/arm/boot/dts/ti/omap/Makefile | 5 +
>>> .../ti/omap/am335x-icev2-prueth-overlay.dtso | 190 ++++++++++++++++++
>>> arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi | 11 +
>>> arch/arm/boot/dts/ti/omap/am4372.dtsi | 11 +
>>> arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts | 137 ++++++++++++-
>>> 5 files changed, 353 insertions(+), 1 deletion(-)
>>> create mode 100644 arch/arm/boot/dts/ti/omap/am335x-icev2-prueth-overlay.dtso
>>>
>>> diff --git a/arch/arm/boot/dts/ti/omap/Makefile
>>> b/arch/arm/boot/dts/ti/omap/Makefile
>>> index 14e500846875..c68948035eca 100644
>>> --- a/arch/arm/boot/dts/ti/omap/Makefile
>>> +++ b/arch/arm/boot/dts/ti/omap/Makefile
>>> @@ -82,6 +82,10 @@ dtb-$(CONFIG_ARCH_OMAP4) += \
>>> omap4-var-stk-om44.dtb \
>>> omap4-xyboard-mz609.dtb \
>>> omap4-xyboard-mz617.dtb
>>> +
>>> +am335x-icev2-prueth-dtbs := am335x-icev2.dtb \
>>> + am335x-icev2-prueth-overlay.dtbo
>>> +
>>> dtb-$(CONFIG_SOC_AM33XX) += \
>>> am335x-baltos-ir2110.dtb \
>>> am335x-baltos-ir3220.dtb \
>>> @@ -100,6 +104,7 @@ dtb-$(CONFIG_SOC_AM33XX) += \
>>> am335x-evmsk.dtb \
>>> am335x-guardian.dtb \
>>> am335x-icev2.dtb \
>>> + am335x-icev2-prueth.dtb \
>>> am335x-lxm.dtb \
>>> am335x-mba335x.dtb \
>>> am335x-moxa-uc-2101.dtb \
>>> diff --git a/arch/arm/boot/dts/ti/omap/am335x-icev2-prueth-overlay.dtso
>>> b/arch/arm/boot/dts/ti/omap/am335x-icev2-prueth-overlay.dtso
>>> new file mode 100644
>>> index 000000000000..abde5119875f
>>> --- /dev/null
>>> +++ b/arch/arm/boot/dts/ti/omap/am335x-icev2-prueth-overlay.dtso
>>> @@ -0,0 +1,190 @@
>>> +// SPDX-License-Identifier: GPL-2.0
>>> +/*
>>> + * DT overlay for IDK AM335x
>>> + *
>>> + * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
>>> + */
>>> +
>>> +/*
>>> + * AM335x ICE V2 board
>>> + * http://www.ti.com/tool/tmdsice3359
>>> + */
>>> +
>>> +/dts-v1/;
>>> +/plugin/;
>>> +
>>> +#include <dt-bindings/bus/ti-sysc.h>
>>> +#include <dt-bindings/gpio/gpio.h>
>>> +#include <dt-bindings/pinctrl/am33xx.h>
>>> +#include <dt-bindings/clock/am3.h>
>>> +
>>> +&{/} {
>>> + /* Dual-MAC Ethernet application node on PRU-ICSS */
>>> + pruss_eth: pruss-eth {
>>> + compatible = "ti,am3359-prueth";
>>> + ti,prus = <&pru0>, <&pru1>;
>>> + sram = <&ocmcram>;
>>> + ti,mii-rt = <&pruss_mii_rt>;
>>> + ti,iep = <&pruss_iep>;
>>> + ti,ecap = <&pruss_ecap>;
>>> + interrupts = <20 2 2>, <21 3 3>;
>>> + interrupt-names = "rx_hp", "rx_lp";
>>> + interrupt-parent = <&pruss_intc>;
>>> +
>>> + pinctrl-0 = <&pruss_eth_default>;
>>> + pinctrl-names = "default";
>>> +
>>> + ethernet-ports {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + pruss_emac0: ethernet-port@0 {
>>> + reg = <0>;
>>> + phy-handle = <&pruss_eth0_phy>;
>>> + phy-mode = "mii";
>>> + interrupts = <20 2 2>, <26 6 6>, <23 6 6>;
>>> + interrupt-names = "rx", "emac_ptp_tx",
>>> + "hsr_ptp_tx";
>>> + /* Filled in by bootloader */
>>> + local-mac-address = [00 00 00 00 00 00];
>>> + };
>>> +
>>> + pruss_emac1: ethernet-port@1 {
>>> + reg = <1>;
>>> + phy-handle = <&pruss_eth1_phy>;
>>> + phy-mode = "mii";
>>> + interrupts = <21 3 3>, <27 9 7>, <24 9 7>;
>>> + interrupt-names = "rx", "emac_ptp_tx",
>>> + "hsr_ptp_tx";
>>> + /* Filled in by bootloader */
>>> + local-mac-address = [00 00 00 00 00 00];
>>> + };
>>> + };
>>> + };
>>> +};
>>> +
>>> +&am33xx_pinmux {
>>> + /* MDIO node for PRU-ICSS */
>>> + pruss_mdio_default: pruss_mdio_default {
>>> + pinctrl-single,pins = <
>>> + /* gpmc_clk.pr1_mdio_mdclk */
>>> + AM33XX_PADCONF(0x88c, PIN_OUTPUT, MUX_MODE5)
>>> + /* gpmc_csn3.pr1_mdio_data */
>>> + AM33XX_PADCONF(0x888, PIN_INPUT, MUX_MODE5)
>>
>> Have you regenerated this list lately? The pinmux tool usually puts the
>> comment after the PADCONF entry. It also now also shows the pin number
>> in the comment which is nice:
>>
>> AM33XX_IOPAD(0x88c, PIN_OUTPUT, MUX_MODE5) /* (V12) gpmc_clk.pr1_mdio_mdclk */
>> AM33XX_IOPAD(0x888, PIN_INPUT, MUX_MODE5) /* (T13) gpmc_csn3.pr1_mdio_data */
>>
>> I'd recommend regenerating these nodes to match the latest pinmux tool output.
>>
>
> Sure, we will check and regenerate these nodes using the pinmux tool and
> update accordingly.
>
>>> + /* gpmc_ben0_cle.gpio2_5 */
>>> + AM33XX_PADCONF(0x89c, PIN_INPUT_PULLUP, MUX_MODE7)
>>> + /* disable CPSW MDIO */
>>
>> Is this needed? If you disable the CPSW MDIO node the pinmux should be unset,
>> so not sure why you are muxing these to GPIO pins.
>>
>
> We will review and get back with more details on this.
>
On the AM335x board, the CPSW MDIO and PRUSS MDIO signals are routed to the same physical
pins (as shown in the schematic, see page 10 “MII_MUX” in tmdxice3359_sch_3h0013_v2_1a.pdf
from https://www.ti.com/lit/zip/TIDR336 ). Because of this shared routing, the pinmux
configuration applied by U-Boot for CPSW MDIO remains active even if the CPSW MDIO node is
later disabled in Linux, and Linux does not automatically revert the pins to their reset state.
To prevent signal contention and ensure correct PRUSS MDIO operation, we explicitly re-mux
the CPSW MDIO pins to GPIO in the PRUSS pinctrl. Without this explicit reconfiguration, we
observed PHY connection issues during startup.
Thanks and Regards,
Parvathi.
> On the AM335x board, the CPSW MDIO and PRUSS MDIO signals are routed to the same physical > pins (as shown in the schematic, see page 10 “MII_MUX” in tmdxice3359_sch_3h0013_v2_1a.pdf > from https://www.ti.com/lit/zip/TIDR336 ). Because of this shared routing, the pinmux > configuration applied by U-Boot for CPSW MDIO remains active even if the CPSW MDIO node is > later disabled in Linux, and Linux does not automatically revert the pins to their reset state. It is generally a bad idea to rely on the bootloader. I would make the CPSW MDIO configure the pins how it needs it. The PRUSS MDIO should also configure the pins how it needs them. However, it is not as simple as that... Looking at the schematic, what you have is ugly. You literally wire the outputs together, without a hardware mux. For MDC you assume one is Hi-Z, while the other drives the line. For MDIO it does not matter, both are inputs. so Hi-Z. I actually think you might need to represent this in Linux, with something i would call a pinmux-mux. You give it two sets of pinmux configurations. The active device claims the mux and gets it to set the two sets of pinmux as needed. Also, just setting the pinmux to GPIO is not sufficient, you also need to ensure the GPIO is configured for input, so the lines go Hi-Z. Often pinmux and GPIO controllers are interconnected, so the pinmux subsystem might be able to do that for you. I don't know if a pinmux-mux already exists in Linux. You probably want to ask on the pinmux mailing list, or they might have a different idea how to cleanly do this. Andrew
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