From: Anirudh Rayabharam (Microsoft) <anirudh@anirudhrb.com>

Add definitions required for handling GPA intercepts on arm64.

Signed-off-by: Anirudh Rayabharam (Microsoft) <anirudh@anirudhrb.com>
---
 include/hyperv/hvhdk.h | 47 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 47 insertions(+)

diff --git a/include/hyperv/hvhdk.h b/include/hyperv/hvhdk.h
index 469186df7826..08965970c17d 100644
--- a/include/hyperv/hvhdk.h
+++ b/include/hyperv/hvhdk.h
@@ -800,6 +800,53 @@ struct hv_x64_memory_intercept_message {
 	u8 instruction_bytes[16];
 } __packed;
 
+#if IS_ENABLED(CONFIG_ARM64)
+union hv_arm64_vp_execution_state {
+	u16 as_uint16;
+	struct {
+		u16 cpl:2; /* Exception Level (EL) */
+		u16 debug_active:1;
+		u16 interruption_pending:1;
+		u16 vtl:4;
+		u16 virtualization_fault_active:1;
+		u16 reserved:7;
+	} __packed;
+};
+
+struct hv_arm64_intercept_message_header {
+	u32 vp_index;
+	u8 instruction_length;
+	u8 intercept_access_type;
+	union hv_arm64_vp_execution_state execution_state;
+	u64 pc;
+	u64 cpsr;
+} __packed;
+
+union hv_arm64_memory_access_info {
+	u8 as_uint8;
+	struct {
+		u8 gva_valid:1;
+		u8 gva_gpa_valid:1;
+		u8 hypercall_output_pending:1;
+		u8 reserved:5;
+	} __packed;
+};
+
+struct hv_arm64_memory_intercept_message {
+	struct hv_arm64_intercept_message_header header;
+	u32 cache_type; /* enum hv_cache_type */
+	u8 instruction_byte_count;
+	union hv_arm64_memory_access_info memory_access_info;
+	u16 reserved1;
+	u8 instruction_bytes[4];
+	u32 reserved2;
+	u64 guest_virtual_address;
+	u64 guest_physical_address;
+	u64 syndrome;
+} __packed;
+
+#endif /* CONFIG_ARM64 */
+
 /*
  * Dispatch state for the VP communicated by the hypervisor to the
  * VP-dispatching thread in the root on return from HVCALL_DISPATCH_VP.
-- 
2.34.1

On Mon, Jan 05, 2026 at 12:28:36PM +0000, Anirudh Rayabharam wrote:
> From: Anirudh Rayabharam (Microsoft) <anirudh@anirudhrb.com>
> 
> Add definitions required for handling GPA intercepts on arm64.
> 
> Signed-off-by: Anirudh Rayabharam (Microsoft) <anirudh@anirudhrb.com>

Reviewed-by: Stanislav Kinsburskii <skinsburskii@linux.microsoft.com>

> ---
>  include/hyperv/hvhdk.h | 47 ++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 47 insertions(+)
> 
> diff --git a/include/hyperv/hvhdk.h b/include/hyperv/hvhdk.h
> index 469186df7826..08965970c17d 100644
> --- a/include/hyperv/hvhdk.h
> +++ b/include/hyperv/hvhdk.h
> @@ -800,6 +800,53 @@ struct hv_x64_memory_intercept_message {
>  	u8 instruction_bytes[16];
>  } __packed;
>  
> +#if IS_ENABLED(CONFIG_ARM64)
> +union hv_arm64_vp_execution_state {
> +	u16 as_uint16;
> +	struct {
> +		u16 cpl:2; /* Exception Level (EL) */
> +		u16 debug_active:1;
> +		u16 interruption_pending:1;
> +		u16 vtl:4;
> +		u16 virtualization_fault_active:1;
> +		u16 reserved:7;
> +	} __packed;
> +};
> +
> +struct hv_arm64_intercept_message_header {
> +	u32 vp_index;
> +	u8 instruction_length;
> +	u8 intercept_access_type;
> +	union hv_arm64_vp_execution_state execution_state;
> +	u64 pc;
> +	u64 cpsr;
> +} __packed;
> +
> +union hv_arm64_memory_access_info {
> +	u8 as_uint8;
> +	struct {
> +		u8 gva_valid:1;
> +		u8 gva_gpa_valid:1;
> +		u8 hypercall_output_pending:1;
> +		u8 reserved:5;
> +	} __packed;
> +};
> +
> +struct hv_arm64_memory_intercept_message {
> +	struct hv_arm64_intercept_message_header header;
> +	u32 cache_type; /* enum hv_cache_type */
> +	u8 instruction_byte_count;
> +	union hv_arm64_memory_access_info memory_access_info;
> +	u16 reserved1;
> +	u8 instruction_bytes[4];
> +	u32 reserved2;
> +	u64 guest_virtual_address;
> +	u64 guest_physical_address;
> +	u64 syndrome;
> +} __packed;
> +
> +#endif /* CONFIG_ARM64 */
> +
>  /*
>   * Dispatch state for the VP communicated by the hypervisor to the
>   * VP-dispatching thread in the root on return from HVCALL_DISPATCH_VP.
> -- 
> 2.34.1
>

> On 01/05/2026 4:28 AM  Anirudh Rayabharam <anirudh@anirudhrb.com> wrote:
> 

[...]

>  
> +#if IS_ENABLED(CONFIG_ARM64)
> +union hv_arm64_vp_execution_state {
> +	u16 as_uint16;
> +	struct {
> +		u16 cpl:2; /* Exception Level (EL) */

Anirudh,

Appreciate following up on the CPL field in that ARM64 structure
and adding the comment!

Still, using something from the x86 parlance (CPL) and adding a comment
stating that this is actually ARM64 EL certainly needs an explanation
as to _why_ using an x86 term here is beneficial, why not just call
the field "el"? As an analogy, here is a thought experiment of writing

#ffdef CONFIG_ARM64
u64 rax; /* This is X0 */
#endif

where an x86 register name would be used to refer to X0 on ARM64, and
that doen't look natural.

So far, I can't seem to find drawbacks in naming this field "el", only
benefits:
* ARM64 folks will immediately know what this field is, and
* the comment isn't required to explain the situation to the reader.

Do you foresee any drawbacks of calling the field "el" and dropping
the comment? If you do, would these drawbacks outweigh the benefits?

[...]

--
Cheers,
Roman

On Mon, Jan 05, 2026 at 08:06:02AM -0800, vdso@mailbox.org wrote:
> 
> > On 01/05/2026 4:28 AM  Anirudh Rayabharam <anirudh@anirudhrb.com> wrote:
> > 
> 
> [...]
> 
> >  
> > +#if IS_ENABLED(CONFIG_ARM64)
> > +union hv_arm64_vp_execution_state {
> > +	u16 as_uint16;
> > +	struct {
> > +		u16 cpl:2; /* Exception Level (EL) */
> 
> Anirudh,
> 
> Appreciate following up on the CPL field in that ARM64 structure
> and adding the comment!

My bad, actually I was gonna explain this in a reply to the previous
thread but it slipped my mind.

> 
> Still, using something from the x86 parlance (CPL) and adding a comment
> stating that this is actually ARM64 EL certainly needs an explanation
> as to _why_ using an x86 term here is beneficial, why not just call
> the field "el"? As an analogy, here is a thought experiment of writing
> 
> #ffdef CONFIG_ARM64
> u64 rax; /* This is X0 */
> #endif
> 
> where an x86 register name would be used to refer to X0 on ARM64, and
> that doen't look natural.

Well, in this case neither CPL nor EL is an architecturally defined
register name. These are just architectural concepts.

> 
> So far, I can't seem to find drawbacks in naming this field "el", only
> benefits:
> * ARM64 folks will immediately know what this field is, and
> * the comment isn't required to explain the situation to the reader.
> 
> Do you foresee any drawbacks of calling the field "el" and dropping
> the comment? If you do, would these drawbacks outweigh the benefits?

As a general rule we want to keep these headers exactly same as the
hypervisor headers so that we can directly ingest them at some point in
the future.

I am not seeing a substantial benefit in breaking that rule. The CPL ->
EL analogy is not a huge leap to make IMO and the comment helps. One
could think of "current privilege level" as a generic term here.

Thanks,
Anirudh.

> 
> [...]
> 
> --
> Cheers,
> Roman

On 1/5/26 11:27, Anirudh Rayabharam wrote:
> On Mon, Jan 05, 2026 at 08:06:02AM -0800, vdso@mailbox.org wrote:
>>
>>> On 01/05/2026 4:28 AM  Anirudh Rayabharam <anirudh@anirudhrb.com> wrote:
>>>
>>
>> [...]
>>
>>>   
>>> +#if IS_ENABLED(CONFIG_ARM64)
>>> +union hv_arm64_vp_execution_state {
>>> +	u16 as_uint16;
>>> +	struct {
>>> +		u16 cpl:2; /* Exception Level (EL) */
>>
>> Anirudh,
>>
>> Appreciate following up on the CPL field in that ARM64 structure
>> and adding the comment!
> 
> My bad, actually I was gonna explain this in a reply to the previous
> thread but it slipped my mind.
> 
>>
>> Still, using something from the x86 parlance (CPL) and adding a comment
>> stating that this is actually ARM64 EL certainly needs an explanation
>> as to _why_ using an x86 term here is beneficial, why not just call
>> the field "el"? As an analogy, here is a thought experiment of writing
>>
>> #ffdef CONFIG_ARM64
>> u64 rax; /* This is X0 */
>> #endif
>>
>> where an x86 register name would be used to refer to X0 on ARM64, and
>> that doen't look natural.
> 
> Well, in this case neither CPL nor EL is an architecturally defined
> register name. These are just architectural concepts.
> 
>>
>> So far, I can't seem to find drawbacks in naming this field "el", only
>> benefits:
>> * ARM64 folks will immediately know what this field is, and
>> * the comment isn't required to explain the situation to the reader.
>>
>> Do you foresee any drawbacks of calling the field "el" and dropping
>> the comment? If you do, would these drawbacks outweigh the benefits?
> 
> As a general rule we want to keep these headers exactly same as the
> hypervisor headers so that we can directly ingest them at some point in
> the future.

Having said that, we've communicated the concern to the hyp team, and
there is no opposition to changing it. After the change is made on
that side, it will propagate to this side in future.

Thanks for your diligence.

-Mukesh



> I am not seeing a substantial benefit in breaking that rule. The CPL ->
> EL analogy is not a huge leap to make IMO and the comment helps. One
> could think of "current privilege level" as a generic term here.
> 
> Thanks,
> Anirudh.
> 
>>
>> [...]
>>
>> --
>> Cheers,
>> Roman