.../dts/ti/k3-j784s4-j742s2-main-common.dtsi | 36 ------------------- arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 36 +++++++++++++++++++ 2 files changed, 36 insertions(+), 36 deletions(-)
As the J742S2 SOC has only 4 cores, remove the extra watchdogs and add
them only for J784S4 SOC.
Fixes: 9cc161a4509c ("arm64: dts: ti: Refactor J784s4 SoC files to a common file")
Signed-off-by: Abhash Kumar Jha <a-kumar2@ti.com>
---
Changes in v2:
- Added fixes tag in the commit message.
- Link to v1: https://lore.kernel.org/all/20251224055410.208516-1-a-kumar2@ti.com/T/#u
.../dts/ti/k3-j784s4-j742s2-main-common.dtsi | 36 -------------------
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 36 +++++++++++++++++++
2 files changed, 36 insertions(+), 36 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
index 9cc0901d58fb..c2636e624f18 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
@@ -2378,42 +2378,6 @@ watchdog3: watchdog@2230000 {
assigned-clock-parents = <&k3_clks 351 4>;
};
- watchdog4: watchdog@2240000 {
- compatible = "ti,j7-rti-wdt";
- reg = <0x00 0x2240000 0x00 0x100>;
- clocks = <&k3_clks 352 0>;
- power-domains = <&k3_pds 352 TI_SCI_PD_EXCLUSIVE>;
- assigned-clocks = <&k3_clks 352 0>;
- assigned-clock-parents = <&k3_clks 352 4>;
- };
-
- watchdog5: watchdog@2250000 {
- compatible = "ti,j7-rti-wdt";
- reg = <0x00 0x2250000 0x00 0x100>;
- clocks = <&k3_clks 353 0>;
- power-domains = <&k3_pds 353 TI_SCI_PD_EXCLUSIVE>;
- assigned-clocks = <&k3_clks 353 0>;
- assigned-clock-parents = <&k3_clks 353 4>;
- };
-
- watchdog6: watchdog@2260000 {
- compatible = "ti,j7-rti-wdt";
- reg = <0x00 0x2260000 0x00 0x100>;
- clocks = <&k3_clks 354 0>;
- power-domains = <&k3_pds 354 TI_SCI_PD_EXCLUSIVE>;
- assigned-clocks = <&k3_clks 354 0>;
- assigned-clock-parents = <&k3_clks 354 4>;
- };
-
- watchdog7: watchdog@2270000 {
- compatible = "ti,j7-rti-wdt";
- reg = <0x00 0x2270000 0x00 0x100>;
- clocks = <&k3_clks 355 0>;
- power-domains = <&k3_pds 355 TI_SCI_PD_EXCLUSIVE>;
- assigned-clocks = <&k3_clks 355 0>;
- assigned-clock-parents = <&k3_clks 355 4>;
- };
-
/*
* The following RTI instances are coupled with MCU R5Fs, c7x and
* GPU so keeping them reserved as these will be used by their
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
index 0160fe0da983..ffc61ec77635 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
@@ -113,6 +113,42 @@ serdes2: serdes@5020000 {
status = "disabled";
};
};
+
+ watchdog4: watchdog@2240000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2240000 0x00 0x100>;
+ clocks = <&k3_clks 352 0>;
+ power-domains = <&k3_pds 352 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 352 0>;
+ assigned-clock-parents = <&k3_clks 352 4>;
+ };
+
+ watchdog5: watchdog@2250000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2250000 0x00 0x100>;
+ clocks = <&k3_clks 353 0>;
+ power-domains = <&k3_pds 353 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 353 0>;
+ assigned-clock-parents = <&k3_clks 353 4>;
+ };
+
+ watchdog6: watchdog@2260000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2260000 0x00 0x100>;
+ clocks = <&k3_clks 354 0>;
+ power-domains = <&k3_pds 354 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 354 0>;
+ assigned-clock-parents = <&k3_clks 354 4>;
+ };
+
+ watchdog7: watchdog@2270000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2270000 0x00 0x100>;
+ clocks = <&k3_clks 355 0>;
+ power-domains = <&k3_pds 355 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 355 0>;
+ assigned-clock-parents = <&k3_clks 355 4>;
+ };
};
&scm_conf {
--
2.34.1
On 10:35-20260105, Abhash Kumar Jha wrote:
> As the J742S2 SOC has only 4 cores, remove the extra watchdogs and add
> them only for J784S4 SOC.
Please fix the $subject and commit message. note, we can read the diff
to understand what you are doing, when you say J742s2 has only 4 cores,
it is not clear what cores are you talking about and why it is related
to watchdogs etc.
>
> Fixes: 9cc161a4509c ("arm64: dts: ti: Refactor J784s4 SoC files to a common file")
> Signed-off-by: Abhash Kumar Jha <a-kumar2@ti.com>
> ---
> Changes in v2:
> - Added fixes tag in the commit message.
> - Link to v1: https://lore.kernel.org/all/20251224055410.208516-1-a-kumar2@ti.com/T/#u
>
> .../dts/ti/k3-j784s4-j742s2-main-common.dtsi | 36 -------------------
> arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 36 +++++++++++++++++++
> 2 files changed, 36 insertions(+), 36 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
> index 9cc0901d58fb..c2636e624f18 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
> @@ -2378,42 +2378,6 @@ watchdog3: watchdog@2230000 {
> assigned-clock-parents = <&k3_clks 351 4>;
> };
>
> - watchdog4: watchdog@2240000 {
> - compatible = "ti,j7-rti-wdt";
> - reg = <0x00 0x2240000 0x00 0x100>;
> - clocks = <&k3_clks 352 0>;
> - power-domains = <&k3_pds 352 TI_SCI_PD_EXCLUSIVE>;
> - assigned-clocks = <&k3_clks 352 0>;
> - assigned-clock-parents = <&k3_clks 352 4>;
> - };
> -
> - watchdog5: watchdog@2250000 {
> - compatible = "ti,j7-rti-wdt";
> - reg = <0x00 0x2250000 0x00 0x100>;
> - clocks = <&k3_clks 353 0>;
> - power-domains = <&k3_pds 353 TI_SCI_PD_EXCLUSIVE>;
> - assigned-clocks = <&k3_clks 353 0>;
> - assigned-clock-parents = <&k3_clks 353 4>;
> - };
> -
> - watchdog6: watchdog@2260000 {
> - compatible = "ti,j7-rti-wdt";
> - reg = <0x00 0x2260000 0x00 0x100>;
> - clocks = <&k3_clks 354 0>;
> - power-domains = <&k3_pds 354 TI_SCI_PD_EXCLUSIVE>;
> - assigned-clocks = <&k3_clks 354 0>;
> - assigned-clock-parents = <&k3_clks 354 4>;
> - };
> -
> - watchdog7: watchdog@2270000 {
> - compatible = "ti,j7-rti-wdt";
> - reg = <0x00 0x2270000 0x00 0x100>;
> - clocks = <&k3_clks 355 0>;
> - power-domains = <&k3_pds 355 TI_SCI_PD_EXCLUSIVE>;
> - assigned-clocks = <&k3_clks 355 0>;
> - assigned-clock-parents = <&k3_clks 355 4>;
> - };
> -
> /*
> * The following RTI instances are coupled with MCU R5Fs, c7x and
> * GPU so keeping them reserved as these will be used by their
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> index 0160fe0da983..ffc61ec77635 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> @@ -113,6 +113,42 @@ serdes2: serdes@5020000 {
> status = "disabled";
> };
> };
> +
> + watchdog4: watchdog@2240000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2240000 0x00 0x100>;
> + clocks = <&k3_clks 352 0>;
> + power-domains = <&k3_pds 352 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 352 0>;
> + assigned-clock-parents = <&k3_clks 352 4>;
> + };
> +
> + watchdog5: watchdog@2250000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2250000 0x00 0x100>;
> + clocks = <&k3_clks 353 0>;
> + power-domains = <&k3_pds 353 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 353 0>;
> + assigned-clock-parents = <&k3_clks 353 4>;
> + };
> +
> + watchdog6: watchdog@2260000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2260000 0x00 0x100>;
> + clocks = <&k3_clks 354 0>;
> + power-domains = <&k3_pds 354 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 354 0>;
> + assigned-clock-parents = <&k3_clks 354 4>;
> + };
> +
> + watchdog7: watchdog@2270000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2270000 0x00 0x100>;
> + clocks = <&k3_clks 355 0>;
> + power-domains = <&k3_pds 355 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 355 0>;
> + assigned-clock-parents = <&k3_clks 355 4>;
> + };
> };
>
> &scm_conf {
> --
> 2.34.1
>
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
https://ti.com/opensource
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