With PWRSTS_OFF_ON, PCIe GDSCs are turned off during gdsc_disable(). This
can happen during scenarios such as system suspend and breaks the resume
of PCIe controllers from suspend.
So use PWRSTS_RET_ON to indicate the GDSC driver to not turn off the GDSCs
during gdsc_disable() and allow the hardware to transition the GDSCs to
retention when the parent domain enters low power state during system
suspend.
Fixes: 161b7c401f4b ("clk: qcom: Add Global Clock controller (GCC) driver for X1E80100")
Cc: stable@vger.kernel.org
Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
---
drivers/clk/qcom/gcc-x1e80100.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/clk/qcom/gcc-x1e80100.c b/drivers/clk/qcom/gcc-x1e80100.c
index e46e65e631513e315de2f663f3dab73e1eb70604..d659d988660ea5e548fcae6f9f2a9a25081e6dda 100644
--- a/drivers/clk/qcom/gcc-x1e80100.c
+++ b/drivers/clk/qcom/gcc-x1e80100.c
@@ -6490,7 +6490,7 @@ static struct gdsc gcc_pcie_0_tunnel_gdsc = {
.pd = {
.name = "gcc_pcie_0_tunnel_gdsc",
},
- .pwrsts = PWRSTS_OFF_ON,
+ .pwrsts = PWRSTS_RET_ON,
.flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE | VOTABLE,
};
@@ -6502,7 +6502,7 @@ static struct gdsc gcc_pcie_1_tunnel_gdsc = {
.pd = {
.name = "gcc_pcie_1_tunnel_gdsc",
},
- .pwrsts = PWRSTS_OFF_ON,
+ .pwrsts = PWRSTS_RET_ON,
.flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE | VOTABLE,
};
@@ -6514,7 +6514,7 @@ static struct gdsc gcc_pcie_2_tunnel_gdsc = {
.pd = {
.name = "gcc_pcie_2_tunnel_gdsc",
},
- .pwrsts = PWRSTS_OFF_ON,
+ .pwrsts = PWRSTS_RET_ON,
.flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE | VOTABLE,
};
@@ -6526,7 +6526,7 @@ static struct gdsc gcc_pcie_3_gdsc = {
.pd = {
.name = "gcc_pcie_3_gdsc",
},
- .pwrsts = PWRSTS_OFF_ON,
+ .pwrsts = PWRSTS_RET_ON,
.flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE | VOTABLE,
};
@@ -6550,7 +6550,7 @@ static struct gdsc gcc_pcie_4_gdsc = {
.pd = {
.name = "gcc_pcie_4_gdsc",
},
- .pwrsts = PWRSTS_OFF_ON,
+ .pwrsts = PWRSTS_RET_ON,
.flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE | VOTABLE,
};
@@ -6574,7 +6574,7 @@ static struct gdsc gcc_pcie_5_gdsc = {
.pd = {
.name = "gcc_pcie_5_gdsc",
},
- .pwrsts = PWRSTS_OFF_ON,
+ .pwrsts = PWRSTS_RET_ON,
.flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE | VOTABLE,
};
@@ -6610,7 +6610,7 @@ static struct gdsc gcc_pcie_6a_gdsc = {
.pd = {
.name = "gcc_pcie_6a_gdsc",
},
- .pwrsts = PWRSTS_OFF_ON,
+ .pwrsts = PWRSTS_RET_ON,
.flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE | VOTABLE,
};
@@ -6622,7 +6622,7 @@ static struct gdsc gcc_pcie_6b_gdsc = {
.pd = {
.name = "gcc_pcie_6b_gdsc",
},
- .pwrsts = PWRSTS_OFF_ON,
+ .pwrsts = PWRSTS_RET_ON,
.flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE | VOTABLE,
};
--
2.34.1
On 02/01/2026 09:43, Krishna Chaitanya Chundru wrote:
> With PWRSTS_OFF_ON, PCIe GDSCs are turned off during gdsc_disable(). This
> can happen during scenarios such as system suspend and breaks the resume
> of PCIe controllers from suspend.
>
> So use PWRSTS_RET_ON to indicate the GDSC driver to not turn off the GDSCs
> during gdsc_disable() and allow the hardware to transition the GDSCs to
> retention when the parent domain enters low power state during system
> suspend.
>
> Fixes: 161b7c401f4b ("clk: qcom: Add Global Clock controller (GCC) driver for X1E80100")
> Cc: stable@vger.kernel.org
> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
> ---
> drivers/clk/qcom/gcc-x1e80100.c | 16 ++++++++--------
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/clk/qcom/gcc-x1e80100.c b/drivers/clk/qcom/gcc-x1e80100.c
> index e46e65e631513e315de2f663f3dab73e1eb70604..d659d988660ea5e548fcae6f9f2a9a25081e6dda 100644
> --- a/drivers/clk/qcom/gcc-x1e80100.c
> +++ b/drivers/clk/qcom/gcc-x1e80100.c
> @@ -6490,7 +6490,7 @@ static struct gdsc gcc_pcie_0_tunnel_gdsc = {
> .pd = {
> .name = "gcc_pcie_0_tunnel_gdsc",
> },
> - .pwrsts = PWRSTS_OFF_ON,
> + .pwrsts = PWRSTS_RET_ON,
> .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE | VOTABLE,
> };
>
> @@ -6502,7 +6502,7 @@ static struct gdsc gcc_pcie_1_tunnel_gdsc = {
> .pd = {
> .name = "gcc_pcie_1_tunnel_gdsc",
> },
> - .pwrsts = PWRSTS_OFF_ON,
> + .pwrsts = PWRSTS_RET_ON,
> .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE | VOTABLE,
> };
>
> @@ -6514,7 +6514,7 @@ static struct gdsc gcc_pcie_2_tunnel_gdsc = {
> .pd = {
> .name = "gcc_pcie_2_tunnel_gdsc",
> },
> - .pwrsts = PWRSTS_OFF_ON,
> + .pwrsts = PWRSTS_RET_ON,
> .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE | VOTABLE,
> };
>
> @@ -6526,7 +6526,7 @@ static struct gdsc gcc_pcie_3_gdsc = {
> .pd = {
> .name = "gcc_pcie_3_gdsc",
> },
> - .pwrsts = PWRSTS_OFF_ON,
> + .pwrsts = PWRSTS_RET_ON,
> .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE | VOTABLE,
> };
>
> @@ -6550,7 +6550,7 @@ static struct gdsc gcc_pcie_4_gdsc = {
> .pd = {
> .name = "gcc_pcie_4_gdsc",
> },
> - .pwrsts = PWRSTS_OFF_ON,
> + .pwrsts = PWRSTS_RET_ON,
> .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE | VOTABLE,
> };
>
> @@ -6574,7 +6574,7 @@ static struct gdsc gcc_pcie_5_gdsc = {
> .pd = {
> .name = "gcc_pcie_5_gdsc",
> },
> - .pwrsts = PWRSTS_OFF_ON,
> + .pwrsts = PWRSTS_RET_ON,
> .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE | VOTABLE,
> };
>
> @@ -6610,7 +6610,7 @@ static struct gdsc gcc_pcie_6a_gdsc = {
> .pd = {
> .name = "gcc_pcie_6a_gdsc",
> },
> - .pwrsts = PWRSTS_OFF_ON,
> + .pwrsts = PWRSTS_RET_ON,
> .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE | VOTABLE,
> };
>
> @@ -6622,7 +6622,7 @@ static struct gdsc gcc_pcie_6b_gdsc = {
> .pd = {
> .name = "gcc_pcie_6b_gdsc",
> },
> - .pwrsts = PWRSTS_OFF_ON,
> + .pwrsts = PWRSTS_RET_ON,
> .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE | VOTABLE,
> };
>
>
Retitle patch "Switch PCIe GDSCs to retention mode" you're really
telling firmware to switch these GDSCs to retention mode in suspend -
"power collapse" might be a better word.
Anyway I think you should switch from a "don't switch off" to a positive
and more accurate description of what you're doing which is switching
the GDSCs to retention mode.
With that
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
For the series.
---
bod
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