Purwa shares the Hamoa (X1E80100) PDC device, but the hardware register
bug addressed in commit e9a48ea4d90b ("irqchip/qcom-pdc: Workaround
hardware register bug on X1E80100") is already fixed in Purwa silicon.

Hamoa compatible forces the software workaround. Add PDC compatible
for purwa as "qcom,x1p42100-pdc" to remove the workaround from Purwa.

Fixes: f08edb529916 ("arm64: dts: qcom: Add X1P42100 SoC and CRD")
Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
---
 Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
index b26246de31862dadd1bfb2a3a93a64ca9fb1c2e8..01abbb980e11152d2fca84507c9587c3a025c39a 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
@@ -53,6 +53,7 @@ properties:
           - qcom,sm8650-pdc
           - qcom,sm8750-pdc
           - qcom,x1e80100-pdc
+          - qcom,x1p42100-pdc
       - const: qcom,pdc
 
   reg:

-- 
2.34.1

On 31/12/2025 11:18, Maulik Shah wrote:
> Purwa shares the Hamoa (X1E80100) PDC device, but the hardware register

We don't use Hamoa name in upstream.

> bug addressed in commit e9a48ea4d90b ("irqchip/qcom-pdc: Workaround
> hardware register bug on X1E80100") is already fixed in Purwa silicon.
> 
> Hamoa compatible forces the software workaround. Add PDC compatible
> for purwa as "qcom,x1p42100-pdc" to remove the workaround from Purwa.
> 
> Fixes: f08edb529916 ("arm64: dts: qcom: Add X1P42100 SoC and CRD")

Your are describing wrong bug being fixed... or actually not a bug.
Every SoC should have dedicated compatible (see writing bindings) and
missing compatible is not a bug.

Best regards,
Krzysztof

On Wed, Dec 31, 2025 at 11:49:00AM +0100, Krzysztof Kozlowski wrote:
> On 31/12/2025 11:18, Maulik Shah wrote:
> > Purwa shares the Hamoa (X1E80100) PDC device, but the hardware register
> 
> We don't use Hamoa name in upstream.
> 

Using "Hamoa" and "Purwa" is approved and IMO preferable. I do like how
Maulik included the X1E80100 name here, to ensure continuity with times
before we did.

In fact, I'd prefer $subject to use "Purwa" instead of "x1p42100" -
quite likely that's not even the Purwa SKU that Maulik tested this on.

Regards,
Bjorn

> > bug addressed in commit e9a48ea4d90b ("irqchip/qcom-pdc: Workaround
> > hardware register bug on X1E80100") is already fixed in Purwa silicon.
> > 
> > Hamoa compatible forces the software workaround. Add PDC compatible
> > for purwa as "qcom,x1p42100-pdc" to remove the workaround from Purwa.
> > 
> > Fixes: f08edb529916 ("arm64: dts: qcom: Add X1P42100 SoC and CRD")
> 
> Your are describing wrong bug being fixed... or actually not a bug.
> Every SoC should have dedicated compatible (see writing bindings) and
> missing compatible is not a bug.
> 
> Best regards,
> Krzysztof

On 12/31/2025 4:19 PM, Krzysztof Kozlowski wrote:
> On 31/12/2025 11:18, Maulik Shah wrote:
>> Purwa shares the Hamoa (X1E80100) PDC device, but the hardware register
> 
> We don't use Hamoa name in upstream.

Okay, I will not use hamoa/purwa, will use X1E80100/X1P42100 everywhere in v2.

> 
>> bug addressed in commit e9a48ea4d90b ("irqchip/qcom-pdc: Workaround
>> hardware register bug on X1E80100") is already fixed in Purwa silicon.
>>
>> Hamoa compatible forces the software workaround. Add PDC compatible
>> for purwa as "qcom,x1p42100-pdc" to remove the workaround from Purwa.
>>
>> Fixes: f08edb529916 ("arm64: dts: qcom: Add X1P42100 SoC and CRD")
> 
> Your are describing wrong bug being fixed... or actually not a bug.
> Every SoC should have dedicated compatible (see writing bindings) and
> missing compatible is not a bug.

The X1P42100 SoC today shares most of the devices with X1E80100 SoC as is,
with X1E80100 as bigger brother.

Adding new compatible for X1P42100 PDC to avoid applying the S/W workaround
for the H/W bug of X1E80100 should be as per writing bindings which says,
   - DO add new compatibles in case there are new features or bugs.

Adding The Fixes: tag for binding will also help when patch-2 of the series
gets backported, the binding change also gets automatically picked up.

Thanks,
Maulik

On 02/01/2026 05:23, Maulik Shah (mkshah) wrote:
>> Your are describing wrong bug being fixed... or actually not a bug.
>> Every SoC should have dedicated compatible (see writing bindings) and
>> missing compatible is not a bug.
> 
> The X1P42100 SoC today shares most of the devices with X1E80100 SoC as is,
> with X1E80100 as bigger brother.
> 
> Adding new compatible for X1P42100 PDC to avoid applying the S/W workaround
> for the H/W bug of X1E80100 should be as per writing bindings which says,
>    - DO add new compatibles in case there are new features or bugs.

So you just repeated what I said. We both agree. It's not a bug.

> 
> Adding The Fixes: tag for binding will also help when patch-2 of the series
> gets backported, the binding change also gets automatically picked up.

Does not matter. You do not add fake Fixes tag for that reason.

Best regards,
Krzysztof

On 12/31/25 11:49 AM, Krzysztof Kozlowski wrote:
> On 31/12/2025 11:18, Maulik Shah wrote:
>> Purwa shares the Hamoa (X1E80100) PDC device, but the hardware register
> 
> We don't use Hamoa name in upstream.

(the file is now called hamoa.dtsi)

Konrad

>> bug addressed in commit e9a48ea4d90b ("irqchip/qcom-pdc: Workaround
>> hardware register bug on X1E80100") is already fixed in Purwa silicon.
>>
>> Hamoa compatible forces the software workaround. Add PDC compatible
>> for purwa as "qcom,x1p42100-pdc" to remove the workaround from Purwa.
>>
>> Fixes: f08edb529916 ("arm64: dts: qcom: Add X1P42100 SoC and CRD")
> 
> Your are describing wrong bug being fixed... or actually not a bug.
> Every SoC should have dedicated compatible (see writing bindings) and
> missing compatible is not a bug.
> 
> Best regards,
> Krzysztof