drivers/iio/frequency/adf4377.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
The regmap_read_poll_timeout() uses ADF4377_0000_SOFT_RESET_R_MSK
twice instead of checking both SOFT_RESET_MSK (bit 0) and
SOFT_RESET_R_MSK (bit 7). This causes incomplete reset status check.
Fix by using both masks as done in regmap_update_bits() above.
Signed-off-by: SeungJu Cheon <suunj1331@gmail.com>
---
drivers/iio/frequency/adf4377.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iio/frequency/adf4377.c b/drivers/iio/frequency/adf4377.c
index 08833b7035e4..48aa4b015a14 100644
--- a/drivers/iio/frequency/adf4377.c
+++ b/drivers/iio/frequency/adf4377.c
@@ -501,7 +501,7 @@ static int adf4377_soft_reset(struct adf4377_state *st)
return ret;
return regmap_read_poll_timeout(st->regmap, 0x0, read_val,
- !(read_val & (ADF4377_0000_SOFT_RESET_R_MSK |
+ !(read_val & (ADF4377_0000_SOFT_RESET_MSK |
ADF4377_0000_SOFT_RESET_R_MSK)), 200, 200 * 100);
}
--
2.52.0
On Tue, Dec 30, 2025 at 09:36:09PM +0900, SeungJu Cheon wrote: > The regmap_read_poll_timeout() uses ADF4377_0000_SOFT_RESET_R_MSK > twice instead of checking both SOFT_RESET_MSK (bit 0) and > SOFT_RESET_R_MSK (bit 7). This causes incomplete reset status check. > > Fix by using both masks as done in regmap_update_bits() above. Shouldn't we have a Fixes tag here? -- With Best Regards, Andy Shevchenko
The regmap_read_poll_timeout() uses ADF4377_0000_SOFT_RESET_R_MSK
twice instead of checking both SOFT_RESET_MSK (bit 0) and
SOFT_RESET_R_MSK (bit 7). This causes incomplete reset status check.
Fix by using both masks as done in regmap_update_bits() above.
Fixes: eda549e2e524 ("iio:frequency:adf4377: add support for ADF4377")
Signed-off-by: SeungJu Cheon <suunj1331@gmail.com>
---
drivers/iio/frequency/adf4377.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iio/frequency/adf4377.c b/drivers/iio/frequency/adf4377.c
index 08833b7035e4..48aa4b015a14 100644
--- a/drivers/iio/frequency/adf4377.c
+++ b/drivers/iio/frequency/adf4377.c
@@ -501,7 +501,7 @@ static int adf4377_soft_reset(struct adf4377_state *st)
return ret;
return regmap_read_poll_timeout(st->regmap, 0x0, read_val,
- !(read_val & (ADF4377_0000_SOFT_RESET_R_MSK |
+ !(read_val & (ADF4377_0000_SOFT_RESET_MSK |
ADF4377_0000_SOFT_RESET_R_MSK)), 200, 200 * 100);
}
--
2.52.0
On Tue, Dec 30, 2025 at 3:21 PM SeungJu Cheon <suunj1331@gmail.com> wrote: > > The regmap_read_poll_timeout() uses ADF4377_0000_SOFT_RESET_R_MSK > twice instead of checking both SOFT_RESET_MSK (bit 0) and > SOFT_RESET_R_MSK (bit 7). This causes incomplete reset status check. an incomplete > Fix by using both masks as done in regmap_update_bits() above. ... May I ask how you tested this? Logically from the code it sounds correct, but I haven't read the datasheet yet, so I can't tell if this is the expected value to read or not. > return regmap_read_poll_timeout(st->regmap, 0x0, read_val, > - !(read_val & (ADF4377_0000_SOFT_RESET_R_MSK | > + !(read_val & (ADF4377_0000_SOFT_RESET_MSK | > ADF4377_0000_SOFT_RESET_R_MSK)), 200, 200 * 100); Okay, I opened the datasheet, and the below is what I read there. The code first sets the SOFT_RESET_R and SOFT_RESET bits to "1", and waits for them to be cleared. But the Table 43 does not mention that SOFT_RESET_R is auto cleaned, and actually I don't see with a brief look what the "repeat of" term means. And for normal operation they needs to be 0ed as per: "SOFT_RESET, SOFT_RESET_R, RST_SYS, and ADC_ST_CNV are the only remaining RW bit fields not mentioned yet, and must also be set to their POR state (see Table 34)." With that said, I would wait for AD people to clarify the programming workflow here. -- With Best Regards, Andy Shevchenko
On Wed, 31 Dec 2025 13:19:46 +0200 Andy Shevchenko <andy.shevchenko@gmail.com> wrote: > On Tue, Dec 30, 2025 at 3:21 PM SeungJu Cheon <suunj1331@gmail.com> wrote: > > > > The regmap_read_poll_timeout() uses ADF4377_0000_SOFT_RESET_R_MSK > > twice instead of checking both SOFT_RESET_MSK (bit 0) and > > SOFT_RESET_R_MSK (bit 7). This causes incomplete reset status check. > > an incomplete > > > Fix by using both masks as done in regmap_update_bits() above. > > ... > > > May I ask how you tested this? Logically from the code it sounds > correct, but I haven't read the datasheet yet, so I can't tell if this > is the expected value to read or not. > > > > return regmap_read_poll_timeout(st->regmap, 0x0, read_val, > > - !(read_val & (ADF4377_0000_SOFT_RESET_R_MSK | > > + !(read_val & (ADF4377_0000_SOFT_RESET_MSK | > > ADF4377_0000_SOFT_RESET_R_MSK)), 200, 200 * 100); > > Okay, I opened the datasheet, and the below is what I read there. The > code first sets the SOFT_RESET_R and SOFT_RESET bits to "1", and waits > for them to be cleared. But the Table 43 does not mention that > SOFT_RESET_R is auto cleaned, and actually I don't see with a brief > look what the "repeat of" term means. > > And for normal operation they needs to be 0ed as per: > "SOFT_RESET, SOFT_RESET_R, RST_SYS, and ADC_ST_CNV are the only > remaining RW bit fields not mentioned yet, and must also be set to > their POR state (see Table 34)." > > With that said, I would wait for AD people to clarify the programming > workflow here. > Small kernel development process thing as well. Please don't send a v2 in reply to a v1. It can become very confusing if we end up with a larger number of versions. Much better to just post a new thread for each version, and include a link back to the lore archive of the previous version in your cover letter. Also from a practical point of view, it ends up pages up in people's inboxes and so is is less likely to get reviewed! Thanks Jonathan
On Sun, 11 Jan 2026 12:09:25 +0000 Jonathan Cameron <jic23@kernel.org> wrote: > On Wed, 31 Dec 2025 13:19:46 +0200 > Andy Shevchenko <andy.shevchenko@gmail.com> wrote: > > > On Tue, Dec 30, 2025 at 3:21 PM SeungJu Cheon <suunj1331@gmail.com> wrote: > > > > > > The regmap_read_poll_timeout() uses ADF4377_0000_SOFT_RESET_R_MSK > > > twice instead of checking both SOFT_RESET_MSK (bit 0) and > > > SOFT_RESET_R_MSK (bit 7). This causes incomplete reset status check. > > > > an incomplete > > > > > Fix by using both masks as done in regmap_update_bits() above. > > > > ... > > > > > > May I ask how you tested this? Logically from the code it sounds > > correct, but I haven't read the datasheet yet, so I can't tell if this > > is the expected value to read or not. > > > > > > > return regmap_read_poll_timeout(st->regmap, 0x0, read_val, > > > - !(read_val & (ADF4377_0000_SOFT_RESET_R_MSK | > > > + !(read_val & (ADF4377_0000_SOFT_RESET_MSK | > > > ADF4377_0000_SOFT_RESET_R_MSK)), 200, 200 * 100); > > > > Okay, I opened the datasheet, and the below is what I read there. The > > code first sets the SOFT_RESET_R and SOFT_RESET bits to "1", and waits > > for them to be cleared. But the Table 43 does not mention that > > SOFT_RESET_R is auto cleaned, and actually I don't see with a brief > > look what the "repeat of" term means. > > > > And for normal operation they needs to be 0ed as per: > > "SOFT_RESET, SOFT_RESET_R, RST_SYS, and ADC_ST_CNV are the only > > remaining RW bit fields not mentioned yet, and must also be set to > > their POR state (see Table 34)." > > > > With that said, I would wait for AD people to clarify the programming > > workflow here. > > > > Small kernel development process thing as well. Please don't send a v2 in reply to a v1. > It can become very confusing if we end up with a larger number of versions. > Much better to just post a new thread for each version, and include > a link back to the lore archive of the previous version in your cover letter. > > Also from a practical point of view, it ends up pages up in people's inboxes and > so is is less likely to get reviewed! > > Thanks > > Jonathan > ADI folk. This is waiting for one of you to take a look at the questions Andy raised. Thanks! Jonathan
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