[PATCH v6 0/2] drm/msm/dpu: fix vsync source programming on DPU >= 8.0

Dmitry Baryshkov posted 2 patches 1 month, 1 week ago
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 18 +++++------
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 49 +++++++++++++++++++++++++++--
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h |  3 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c  |  7 -----
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h |  7 +++++
5 files changed, 64 insertions(+), 20 deletions(-)
[PATCH v6 0/2] drm/msm/dpu: fix vsync source programming on DPU >= 8.0
Posted by Dmitry Baryshkov 1 month, 1 week ago
Currently VSYNC SEL programming is performed only if there is a
corresponding callback at the top block. However, DPU >= 8.0 don't have
that callback, making the driver skip all vsync programming. Make the
driver always check both TOP and INTF callbacks.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
Changes in v6:
- Spell out all necessary bits instead of reading INTF_WD_TIMER_0_CTL2
  (Marijn)
- Link to v5: https://lore.kernel.org/r/20251228-intf-fix-wd-v5-0-f6fce628e6f2@oss.qualcomm.com

Changes in v5:
- Fixed typo and white spaces in the commit message (Marijn)
- Dropped superfluous comment (Marijn)
- Moved vsync_cfg.frame_rate init (Marijn)
- Adjusted the Fixes tag for the second patch (Marijn)
- Link to v4: https://lore.kernel.org/r/20251224-intf-fix-wd-v4-0-07a0926fafd2@oss.qualcomm.com

Changes in v3:
- Picked up the series per agreement with Teguh
- Fixed VSYNC SEL programming on DPU < 5.x (Marijn)
- Implemented WD timer support on DPU 8.x
- Link to v2: https://lore.kernel.org/r/TYUPR06MB6099C539BD2C937F8630FF8EDDD5A@TYUPR06MB6099.apcprd06.prod.outlook.com

---
Dmitry Baryshkov (1):
      drm/msm/dpu: fix WD timer handling on DPU 8.x

Teguh Sobirin (1):
      drm/msm/dpu: Set vsync source irrespective of mdp top support

 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 18 +++++------
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 49 +++++++++++++++++++++++++++--
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h |  3 +-
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c  |  7 -----
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h |  7 +++++
 5 files changed, 64 insertions(+), 20 deletions(-)
---
base-commit: d2b6e710d2706c8915fe5e2f961c3365976d2ae1
change-id: 20251224-intf-fix-wd-95862f167fd7

Best regards,
-- 
With best wishes
Dmitry
Re: [PATCH v6 0/2] drm/msm/dpu: fix vsync source programming on DPU >= 8.0
Posted by Dmitry Baryshkov 3 weeks, 1 day ago
On Tue, 30 Dec 2025 09:17:55 +0200, Dmitry Baryshkov wrote:
> Currently VSYNC SEL programming is performed only if there is a
> corresponding callback at the top block. However, DPU >= 8.0 don't have
> that callback, making the driver skip all vsync programming. Make the
> driver always check both TOP and INTF callbacks.
> 
> 

Applied to msm-next, thanks!

[1/2] drm/msm/dpu: Set vsync source irrespective of mdp top support
      https://gitlab.freedesktop.org/lumag/msm/-/commit/1ad9880f059c
[2/2] drm/msm/dpu: fix WD timer handling on DPU 8.x
      https://gitlab.freedesktop.org/lumag/msm/-/commit/794b0e68caba

Best regards,
-- 
With best wishes
Dmitry