This series attempt to add pinctrl support for SpacemiT K3 SoC,

I've removed the RFC tag as the driver is tested on K3 SoC.

The K3 pinctrl IP shares almost same logic with previous K1 SoC generation,
but has different register offset and pin configuration, I've introduced
a pin_to_offset() function to handle the difference of register offset.
for the drive strength and schmitter trigger settings, they are also changed.

The patch #1 try to add pin support which should handle pin mux, while patch #2
adjust drive strength and schmitter trigger settings accordingly for new SoC.

Signed-off-by: Yixun Lan <dlan@gentoo.org>
---
Changes in v2:
- RFC tag removed
- update dt-binding docs for drive strength
- fix wrong argument for drive strength
- Link to v1: https://lore.kernel.org/r/20251220-02-k3-pinctrl-v1-0-f6f4aea60abf@gentoo.org

---
Yixun Lan (3):
      dt-bindings: pinctrl: spacemit: add K3 SoC support
      pinctrl: spacemit: k3: add initial pin support
      pinctrl: spacemit: k3: adjust drive strength and schmitter trigger

 .../bindings/pinctrl/spacemit,k1-pinctrl.yaml      |  12 +-
 drivers/pinctrl/spacemit/Kconfig                   |   4 +-
 drivers/pinctrl/spacemit/pinctrl-k1.c              | 517 +++++++++++++++++++--
 3 files changed, 477 insertions(+), 56 deletions(-)
---
base-commit: 8f0b4cce4481fb22653697cced8d0d04027cb1e8
change-id: 20251125-02-k3-pinctrl-738cbddbe49d

Best regards,
-- 
Yixun Lan

Hi Yixun,

thanks for your patches!

On Fri, Dec 26, 2025 at 1:58 PM Yixun Lan <dlan@gentoo.org> wrote:

> This series attempt to add pinctrl support for SpacemiT K3 SoC,
>
> I've removed the RFC tag as the driver is tested on K3 SoC.
>
> The K3 pinctrl IP shares almost same logic with previous K1 SoC generation,
> but has different register offset and pin configuration, I've introduced
> a pin_to_offset() function to handle the difference of register offset.
> for the drive strength and schmitter trigger settings, they are also changed.
>
> The patch #1 try to add pin support which should handle pin mux, while patch #2
> adjust drive strength and schmitter trigger settings accordingly for new SoC.
>
> Signed-off-by: Yixun Lan <dlan@gentoo.org>

As Krzysztof mentioned, try to use an explicit device tree schema to
enforce the legal drive strength values as e.g. enums.

Other than this the code looks fine so once the bindings are
ACK:ed I'm ready to merge this.

Yours,
Linus Walleij

Hi Linus, Krzysztof, 

On 23:49 Thu 01 Jan     , Linus Walleij wrote:
> Hi Yixun,
> 
> thanks for your patches!
> 
> On Fri, Dec 26, 2025 at 1:58 PM Yixun Lan <dlan@gentoo.org> wrote:
> 
> > This series attempt to add pinctrl support for SpacemiT K3 SoC,
> >
> > I've removed the RFC tag as the driver is tested on K3 SoC.
> >
> > The K3 pinctrl IP shares almost same logic with previous K1 SoC generation,
> > but has different register offset and pin configuration, I've introduced
> > a pin_to_offset() function to handle the difference of register offset.
> > for the drive strength and schmitter trigger settings, they are also changed.
> >
> > The patch #1 try to add pin support which should handle pin mux, while patch #2
> > adjust drive strength and schmitter trigger settings accordingly for new SoC.
> >
> > Signed-off-by: Yixun Lan <dlan@gentoo.org>
> 
> As Krzysztof mentioned, try to use an explicit device tree schema to
> enforce the legal drive strength values as e.g. enums.
> 
Ok, I will address this in v3

> Other than this the code looks fine so once the bindings are
> ACK:ed I'm ready to merge this.
> 
Thanks

-- 
Yixun Lan (dlan)