The QCS8300 MDSS DSI PHY is the same 5nm PHY IP as on SA8775P, with
identical register layout and programming model. Model this by using
a QCS8300 specific compatible with a qcom,sa8775p-dsi-phy-5nm fallback,
and update the schema to require this two entry form for QCS8300 while
keeping existing single compatible users valid.

Signed-off-by: Ayushi Makhija <quic_amakhija@quicinc.com>
---
 .../bindings/display/msm/dsi-phy-7nm.yaml     | 30 +++++++++++--------
 1 file changed, 18 insertions(+), 12 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml b/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml
index 1ca820a500b7..7a83387502da 100644
--- a/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml
@@ -14,18 +14,24 @@ allOf:
 
 properties:
   compatible:
-    enum:
-      - qcom,dsi-phy-7nm
-      - qcom,dsi-phy-7nm-8150
-      - qcom,sa8775p-dsi-phy-5nm
-      - qcom,sar2130p-dsi-phy-5nm
-      - qcom,sc7280-dsi-phy-7nm
-      - qcom,sm6375-dsi-phy-7nm
-      - qcom,sm8350-dsi-phy-5nm
-      - qcom,sm8450-dsi-phy-5nm
-      - qcom,sm8550-dsi-phy-4nm
-      - qcom,sm8650-dsi-phy-4nm
-      - qcom,sm8750-dsi-phy-3nm
+    oneOf:
+      - items:
+          - enum:
+              - qcom,dsi-phy-7nm
+              - qcom,dsi-phy-7nm-8150
+              - qcom,sa8775p-dsi-phy-5nm
+              - qcom,sar2130p-dsi-phy-5nm
+              - qcom,sc7280-dsi-phy-7nm
+              - qcom,sm6375-dsi-phy-7nm
+              - qcom,sm8350-dsi-phy-5nm
+              - qcom,sm8450-dsi-phy-5nm
+              - qcom,sm8550-dsi-phy-4nm
+              - qcom,sm8650-dsi-phy-4nm
+              - qcom,sm8750-dsi-phy-3nm
+      - items:
+          - enum:
+              - qcom,qcs8300-dsi-phy-5nm
+          - const: qcom,sa8775p-dsi-phy-5nm
 
   reg:
     items:
-- 
2.34.1

On 25/12/2025 16:21, Ayushi Makhija wrote:
> The QCS8300 MDSS DSI PHY is the same 5nm PHY IP as on SA8775P, with
> identical register layout and programming model. Model this by using
> a QCS8300 specific compatible with a qcom,sa8775p-dsi-phy-5nm fallback,
> and update the schema to require this two entry form for QCS8300 while
> keeping existing single compatible users valid.
> 
> Signed-off-by: Ayushi Makhija <quic_amakhija@quicinc.com>
> ---
>  .../bindings/display/msm/dsi-phy-7nm.yaml     | 30 +++++++++++--------
>  1 file changed, 18 insertions(+), 12 deletions(-)
> 


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>

Best regards,
Krzysztof

On Thu, Dec 25, 2025 at 08:51:30PM +0530, Ayushi Makhija wrote:
> The QCS8300 MDSS DSI PHY is the same 5nm PHY IP as on SA8775P, with
> identical register layout and programming model. Model this by using
> a QCS8300 specific compatible with a qcom,sa8775p-dsi-phy-5nm fallback,
> and update the schema to require this two entry form for QCS8300 while
> keeping existing single compatible users valid.

Last sentence is redundant. I asked to explain the hardware, not to tell
us how Devicetree works. Write concise and informative commit msgs which
tell non-obvious things. Not what you did. I alreaded asked this - do
not state the obvious, do not copy the subject.

The only useful part of your commit msg is first sentence - two lines,
so 33%. Remaining four lines, so 66%, is obvious.

Best regards,
Krzysztof

On 12/27/2025 4:43 PM, Krzysztof Kozlowski wrote:
> On Thu, Dec 25, 2025 at 08:51:30PM +0530, Ayushi Makhija wrote:
>> The QCS8300 MDSS DSI PHY is the same 5nm PHY IP as on SA8775P, with
>> identical register layout and programming model. Model this by using
>> a QCS8300 specific compatible with a qcom,sa8775p-dsi-phy-5nm fallback,
>> and update the schema to require this two entry form for QCS8300 while
>> keeping existing single compatible users valid.
> 
> Last sentence is redundant. I asked to explain the hardware, not to tell
> us how Devicetree works. Write concise and informative commit msgs which
> tell non-obvious things. Not what you did. I alreaded asked this - do
> not state the obvious, do not copy the subject.
> 
> The only useful part of your commit msg is first sentence - two lines,
> so 33%. Remaining four lines, so 66%, is obvious.
> 
> Best regards,
> Krzysztof
> 

Hi Krzysztof,

Can you please check below commit description is it appropriate  ?

QCS8300 uses the same 5nm MDSS DSI PHY IP as SA8775P, sharing an identical
register layout and programming model. Introduce a QCS8300-specific compatible
with a fallback to `qcom,sa8775p-dsi-phy-5nm` to reflect this hardware reuse.

Thanks,
Ayushi

On 02/01/2026 10:29, Ayushi Makhija wrote:
> On 12/27/2025 4:43 PM, Krzysztof Kozlowski wrote:
>> On Thu, Dec 25, 2025 at 08:51:30PM +0530, Ayushi Makhija wrote:
>>> The QCS8300 MDSS DSI PHY is the same 5nm PHY IP as on SA8775P, with
>>> identical register layout and programming model. Model this by using
>>> a QCS8300 specific compatible with a qcom,sa8775p-dsi-phy-5nm fallback,
>>> and update the schema to require this two entry form for QCS8300 while
>>> keeping existing single compatible users valid.
>>
>> Last sentence is redundant. I asked to explain the hardware, not to tell
>> us how Devicetree works. Write concise and informative commit msgs which
>> tell non-obvious things. Not what you did. I alreaded asked this - do
>> not state the obvious, do not copy the subject.
>>
>> The only useful part of your commit msg is first sentence - two lines,
>> so 33%. Remaining four lines, so 66%, is obvious.
>>
>> Best regards,
>> Krzysztof
>>
> 
> Hi Krzysztof,
> 
> Can you please check below commit description is it appropriate  ?
> 
> QCS8300 uses the same 5nm MDSS DSI PHY IP as SA8775P, sharing an identical
> register layout and programming model. Introduce a QCS8300-specific compatible
> with a fallback to `qcom,sa8775p-dsi-phy-5nm` to reflect this hardware reuse.
> 

Yes, that's very good.

Best regards,
Krzysztof

On 12/27/2025 4:43 PM, Krzysztof Kozlowski wrote:
> On Thu, Dec 25, 2025 at 08:51:30PM +0530, Ayushi Makhija wrote:
>> The QCS8300 MDSS DSI PHY is the same 5nm PHY IP as on SA8775P, with
>> identical register layout and programming model. Model this by using
>> a QCS8300 specific compatible with a qcom,sa8775p-dsi-phy-5nm fallback,
>> and update the schema to require this two entry form for QCS8300 while
>> keeping existing single compatible users valid.
> 
> Last sentence is redundant. I asked to explain the hardware, not to tell
> us how Devicetree works. Write concise and informative commit msgs which
> tell non-obvious things. Not what you did. I alreaded asked this - do
> not state the obvious, do not copy the subject.
> 
> The only useful part of your commit msg is first sentence - two lines,
> so 33%. Remaining four lines, so 66%, is obvious.
> 
> Best regards,
> Krzysztof
> 

Hi Krzysztof, sure will update the commit description accordingly.

Thanks,
Ayushi