Compared to the previous generation IC, the MT8189 uses 34-bit iova
address-space (16GB) and requires a single clock configuration.
Therefore, add new compatible to support the JPEG encoder and decoder
of MT8189 SoC.
Signed-off-by: Jianhua Lin <jianhua.lin@mediatek.com>
---
.../platform/mediatek/jpeg/mtk_jpeg_core.c | 44 +++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
index d08fe365cbb2..9ea8d8f56e9b 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
@@ -1866,6 +1866,10 @@ static struct clk_bulk_data mt8173_jpeg_dec_clocks[] = {
{ .id = "jpgdec" },
};
+static struct clk_bulk_data mtk_jpeg_dec_clocks[] = {
+ { .id = "jpgdec" },
+};
+
static const struct mtk_jpeg_variant mt8173_jpeg_drvdata = {
.clks = mt8173_jpeg_dec_clocks,
.num_clks = ARRAY_SIZE(mt8173_jpeg_dec_clocks),
@@ -1897,6 +1901,38 @@ static const struct mtk_jpeg_variant mtk_jpeg_drvdata = {
.multi_core = false,
};
+static const struct mtk_jpeg_variant mtk8189_jpegenc_drvdata = {
+ .clks = mtk_jpeg_clocks,
+ .num_clks = ARRAY_SIZE(mtk_jpeg_clocks),
+ .formats = mtk_jpeg_enc_formats,
+ .num_formats = MTK_JPEG_ENC_NUM_FORMATS,
+ .qops = &mtk_jpeg_enc_qops,
+ .irq_handler = mtk_jpeg_enc_irq,
+ .hw_reset = mtk_jpeg_enc_reset,
+ .m2m_ops = &mtk_jpeg_enc_m2m_ops,
+ .dev_name = "mtk-jpeg-enc",
+ .ioctl_ops = &mtk_jpeg_enc_ioctl_ops,
+ .out_q_default_fourcc = V4L2_PIX_FMT_YUYV,
+ .cap_q_default_fourcc = V4L2_PIX_FMT_JPEG,
+ .support_34bit = true,
+};
+
+static const struct mtk_jpeg_variant mtk8189_jpegdec_drvdata = {
+ .clks = mtk_jpeg_dec_clocks,
+ .num_clks = ARRAY_SIZE(mtk_jpeg_dec_clocks),
+ .formats = mtk_jpeg_dec_formats,
+ .num_formats = MTK_JPEG_DEC_NUM_FORMATS,
+ .qops = &mtk_jpeg_dec_qops,
+ .irq_handler = mtk_jpeg_dec_irq,
+ .hw_reset = mtk_jpeg_dec_reset,
+ .m2m_ops = &mtk_jpeg_dec_m2m_ops,
+ .dev_name = "mtk-jpeg-dec",
+ .ioctl_ops = &mtk_jpeg_dec_ioctl_ops,
+ .out_q_default_fourcc = V4L2_PIX_FMT_JPEG,
+ .cap_q_default_fourcc = V4L2_PIX_FMT_YUV420M,
+ .support_34bit = true,
+};
+
static struct mtk_jpeg_variant mtk8195_jpegenc_drvdata = {
.formats = mtk_jpeg_enc_formats,
.num_formats = MTK_JPEG_ENC_NUM_FORMATS,
@@ -1936,6 +1972,14 @@ static const struct of_device_id mtk_jpeg_match[] = {
.compatible = "mediatek,mtk-jpgenc",
.data = &mtk_jpeg_drvdata,
},
+ {
+ .compatible = "mediatek,mt8189-jpgenc",
+ .data = &mtk8189_jpegenc_drvdata,
+ },
+ {
+ .compatible = "mediatek,mt8189-jpgdec",
+ .data = &mtk8189_jpegdec_drvdata,
+ },
{
.compatible = "mediatek,mt8195-jpgenc",
.data = &mtk8195_jpegenc_drvdata,
--
2.45.2Le mercredi 24 décembre 2025 à 11:17 +0800, Jianhua Lin a écrit :
> Compared to the previous generation IC, the MT8189 uses 34-bit iova
> address-space (16GB) and requires a single clock configuration.
> Therefore, add new compatible to support the JPEG encoder and decoder
> of MT8189 SoC.
>
> Signed-off-by: Jianhua Lin <jianhua.lin@mediatek.com>
Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
I'll have to wait for some ack on the bindings, which looks otherwise fine to
me. But due to holiday, that might be delayed a little bit.
cheers,
Nicolas
> ---
> .../platform/mediatek/jpeg/mtk_jpeg_core.c | 44 +++++++++++++++++++
> 1 file changed, 44 insertions(+)
>
> diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
> b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
> index d08fe365cbb2..9ea8d8f56e9b 100644
> --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
> +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
> @@ -1866,6 +1866,10 @@ static struct clk_bulk_data mt8173_jpeg_dec_clocks[] =
> {
> { .id = "jpgdec" },
> };
>
> +static struct clk_bulk_data mtk_jpeg_dec_clocks[] = {
> + { .id = "jpgdec" },
> +};
> +
> static const struct mtk_jpeg_variant mt8173_jpeg_drvdata = {
> .clks = mt8173_jpeg_dec_clocks,
> .num_clks = ARRAY_SIZE(mt8173_jpeg_dec_clocks),
> @@ -1897,6 +1901,38 @@ static const struct mtk_jpeg_variant mtk_jpeg_drvdata =
> {
> .multi_core = false,
> };
>
> +static const struct mtk_jpeg_variant mtk8189_jpegenc_drvdata = {
> + .clks = mtk_jpeg_clocks,
> + .num_clks = ARRAY_SIZE(mtk_jpeg_clocks),
> + .formats = mtk_jpeg_enc_formats,
> + .num_formats = MTK_JPEG_ENC_NUM_FORMATS,
> + .qops = &mtk_jpeg_enc_qops,
> + .irq_handler = mtk_jpeg_enc_irq,
> + .hw_reset = mtk_jpeg_enc_reset,
> + .m2m_ops = &mtk_jpeg_enc_m2m_ops,
> + .dev_name = "mtk-jpeg-enc",
> + .ioctl_ops = &mtk_jpeg_enc_ioctl_ops,
> + .out_q_default_fourcc = V4L2_PIX_FMT_YUYV,
> + .cap_q_default_fourcc = V4L2_PIX_FMT_JPEG,
> + .support_34bit = true,
> +};
> +
> +static const struct mtk_jpeg_variant mtk8189_jpegdec_drvdata = {
> + .clks = mtk_jpeg_dec_clocks,
> + .num_clks = ARRAY_SIZE(mtk_jpeg_dec_clocks),
> + .formats = mtk_jpeg_dec_formats,
> + .num_formats = MTK_JPEG_DEC_NUM_FORMATS,
> + .qops = &mtk_jpeg_dec_qops,
> + .irq_handler = mtk_jpeg_dec_irq,
> + .hw_reset = mtk_jpeg_dec_reset,
> + .m2m_ops = &mtk_jpeg_dec_m2m_ops,
> + .dev_name = "mtk-jpeg-dec",
> + .ioctl_ops = &mtk_jpeg_dec_ioctl_ops,
> + .out_q_default_fourcc = V4L2_PIX_FMT_JPEG,
> + .cap_q_default_fourcc = V4L2_PIX_FMT_YUV420M,
> + .support_34bit = true,
> +};
> +
> static struct mtk_jpeg_variant mtk8195_jpegenc_drvdata = {
> .formats = mtk_jpeg_enc_formats,
> .num_formats = MTK_JPEG_ENC_NUM_FORMATS,
> @@ -1936,6 +1972,14 @@ static const struct of_device_id mtk_jpeg_match[] = {
> .compatible = "mediatek,mtk-jpgenc",
> .data = &mtk_jpeg_drvdata,
> },
> + {
> + .compatible = "mediatek,mt8189-jpgenc",
> + .data = &mtk8189_jpegenc_drvdata,
> + },
> + {
> + .compatible = "mediatek,mt8189-jpgdec",
> + .data = &mtk8189_jpegdec_drvdata,
> + },
> {
> .compatible = "mediatek,mt8195-jpgenc",
> .data = &mtk8195_jpegenc_drvdata,
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