The JPEG encoder and decoder of MT8188 share the same architecture
and features as those of MT8189, both use a 34-bit iova
address-space (16GB) and a single clock configuration.
Previously, MT8188 was incorrectly defined alongside SoCs with 32-bit
iova address-space (4GB), such as "mediatek,mt2701-jpgdec" and
"mediatek,mtk-jpgenc". This mismatch results in an ABI break,
as MT8188 cannot function correctly under the 32-bit iova
address-space (4GB) configuration.
Therefore, MT8188 needs to inherit from MT8189.
Update "mediatek,mtk-jpgenc" to "mediatek,mt8189-jpgenc",
update "mediatek,mt2701-jpgdec" to "mediatek,mt8189-jpgdec".
Signed-off-by: Jianhua Lin <jianhua.lin@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8188.dtsi | 9 ++++-----
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8188.dtsi b/arch/arm64/boot/dts/mediatek/mt8188.dtsi
index 90c388f1890f..ff9a774f5911 100644
--- a/arch/arm64/boot/dts/mediatek/mt8188.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8188.dtsi
@@ -2846,7 +2846,7 @@ video_encoder: video-encoder@1a020000 {
};
jpeg_encoder: jpeg-encoder@1a030000 {
- compatible = "mediatek,mt8188-jpgenc", "mediatek,mtk-jpgenc";
+ compatible = "mediatek,mt8188-jpgenc", "mediatek,mt8189-jpgenc";
reg = <0 0x1a030000 0 0x10000>;
clocks = <&vencsys CLK_VENC1_JPGENC>;
clock-names = "jpgenc";
@@ -2859,11 +2859,10 @@ jpeg_encoder: jpeg-encoder@1a030000 {
};
jpeg_decoder: jpeg-decoder@1a040000 {
- compatible = "mediatek,mt8188-jpgdec", "mediatek,mt2701-jpgdec";
+ compatible = "mediatek,mt8188-jpgdec", "mediatek,mt8189-jpgdec";
reg = <0 0x1a040000 0 0x10000>;
- clocks = <&vencsys CLK_VENC1_LARB>,
- <&vencsys CLK_VENC1_JPGDEC>;
- clock-names = "jpgdec-smi", "jpgdec";
+ clocks = <&vencsys CLK_VENC1_JPGDEC>;
+ clock-names = "jpgdec";
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH 0>;
iommus = <&vdo_iommu M4U_PORT_L19_JPGDEC_WDMA_0>,
<&vdo_iommu M4U_PORT_L19_JPGDEC_BSDMA_0>,
--
2.45.2