csr_read64() is only available on 64BIT LoongArch platform, so use
recently added adaptive csr_read() instead, so as to make the driver
work on both 32BIT and 64BIT platform.
BTW, make avecintc_enable() be a no-op since it is only needed by 64BIT
platform.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
---
drivers/irqchip/irq-loongarch-avec.c | 14 ++++++++------
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/irqchip/irq-loongarch-avec.c b/drivers/irqchip/irq-loongarch-avec.c
index ba556c008cf3..fb8efde95393 100644
--- a/drivers/irqchip/irq-loongarch-avec.c
+++ b/drivers/irqchip/irq-loongarch-avec.c
@@ -58,11 +58,13 @@ struct avecintc_data {
static inline void avecintc_enable(void)
{
+#ifdef CONFIG_MACH_LOONGSON64
u64 value;
value = iocsr_read64(LOONGARCH_IOCSR_MISC_FUNC);
value |= IOCSR_MISC_FUNC_AVEC_EN;
iocsr_write64(value, LOONGARCH_IOCSR_MISC_FUNC);
+#endif
}
static inline void avecintc_ack_irq(struct irq_data *d)
@@ -167,7 +169,7 @@ void complete_irq_moving(void)
struct pending_list *plist = this_cpu_ptr(&pending_list);
struct avecintc_data *adata, *tdata;
int cpu, vector, bias;
- uint64_t isr;
+ unsigned long isr;
guard(raw_spinlock)(&loongarch_avec.lock);
@@ -177,16 +179,16 @@ void complete_irq_moving(void)
bias = vector / VECTORS_PER_REG;
switch (bias) {
case 0:
- isr = csr_read64(LOONGARCH_CSR_ISR0);
+ isr = csr_read(LOONGARCH_CSR_ISR0);
break;
case 1:
- isr = csr_read64(LOONGARCH_CSR_ISR1);
+ isr = csr_read(LOONGARCH_CSR_ISR1);
break;
case 2:
- isr = csr_read64(LOONGARCH_CSR_ISR2);
+ isr = csr_read(LOONGARCH_CSR_ISR2);
break;
case 3:
- isr = csr_read64(LOONGARCH_CSR_ISR3);
+ isr = csr_read(LOONGARCH_CSR_ISR3);
break;
}
@@ -234,7 +236,7 @@ static void avecintc_irq_dispatch(struct irq_desc *desc)
chained_irq_enter(chip, desc);
while (true) {
- unsigned long vector = csr_read64(LOONGARCH_CSR_IRR);
+ unsigned long vector = csr_read(LOONGARCH_CSR_IRR);
if (vector & IRR_INVALID_MASK)
break;
--
2.47.3On Tue, Dec 23 2025 at 16:04, Huacai Chen wrote:
> csr_read64() is only available on 64BIT LoongArch platform, so use
> recently added adaptive csr_read() instead, so as to make the driver
> work on both 32BIT and 64BIT platform.
>
> BTW, make avecintc_enable() be a no-op since it is only needed by 64BIT
> platform.
>
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
I assume Jiaxun is the author, which means that this lacks a
From: Jiaxun
line in the mail body before the change log starts. Please try again.
> static inline void avecintc_enable(void)
> {
> +#ifdef CONFIG_MACH_LOONGSON64
> u64 value;
>
> value = iocsr_read64(LOONGARCH_IOCSR_MISC_FUNC);
> value |= IOCSR_MISC_FUNC_AVEC_EN;
> iocsr_write64(value, LOONGARCH_IOCSR_MISC_FUNC);
> +#endif
Can't this be:
if (IS_ENABLED(CONFIG_MACH_LOONGSON64))
which is preferred over ifdeffery?
Thanks,
tglx
On Fri, Jan 9, 2026 at 8:09 PM Thomas Gleixner <tglx@kernel.org> wrote:
>
> On Tue, Dec 23 2025 at 16:04, Huacai Chen wrote:
>
> > csr_read64() is only available on 64BIT LoongArch platform, so use
> > recently added adaptive csr_read() instead, so as to make the driver
> > work on both 32BIT and 64BIT platform.
> >
> > BTW, make avecintc_enable() be a no-op since it is only needed by 64BIT
> > platform.
> >
> > Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> > Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
>
> I assume Jiaxun is the author, which means that this lacks a
>
> From: Jiaxun
>
> line in the mail body before the change log starts. Please try again.
We are co-developer, so I think
Co-developed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
is appropriate.
>
> > static inline void avecintc_enable(void)
> > {
> > +#ifdef CONFIG_MACH_LOONGSON64
> > u64 value;
> >
> > value = iocsr_read64(LOONGARCH_IOCSR_MISC_FUNC);
> > value |= IOCSR_MISC_FUNC_AVEC_EN;
> > iocsr_write64(value, LOONGARCH_IOCSR_MISC_FUNC);
> > +#endif
>
> Can't this be:
>
> if (IS_ENABLED(CONFIG_MACH_LOONGSON64))
>
> which is preferred over ifdeffery?
OK, I will do it in the next version.
Huacai
>
> Thanks,
>
> tglx
>
On Fri, 9 Jan 2026, at 12:09 PM, Thomas Gleixner wrote:
> On Tue, Dec 23 2025 at 16:04, Huacai Chen wrote:
>
>> csr_read64() is only available on 64BIT LoongArch platform, so use
>> recently added adaptive csr_read() instead, so as to make the driver
>> work on both 32BIT and 64BIT platform.
>>
>> BTW, make avecintc_enable() be a no-op since it is only needed by 64BIT
>> platform.
>>
>> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
>> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
>
> I assume Jiaxun is the author, which means that this lacks a
>
> From: Jiaxun
>
> line in the mail body before the change log starts. Please try again.
Yes, Huacai could you please get it fixed?
>
>> static inline void avecintc_enable(void)
>> {
>> +#ifdef CONFIG_MACH_LOONGSON64
>> u64 value;
>>
>> value = iocsr_read64(LOONGARCH_IOCSR_MISC_FUNC);
>> value |= IOCSR_MISC_FUNC_AVEC_EN;
>> iocsr_write64(value, LOONGARCH_IOCSR_MISC_FUNC);
>> +#endif
>
> Can't this be:
>
> if (IS_ENABLED(CONFIG_MACH_LOONGSON64))
>
> which is preferred over ifdeffery?
Sadly, iocsr_read64 symbol is only available on 64 bit systems,
so it must be guarded somehow.
Thanks
>
> Thanks,
>
> tglx
--
- Jiaxun
On Fri, Jan 09 2026 at 12:23, Jiaxun Yang wrote:
> On Fri, 9 Jan 2026, at 12:09 PM, Thomas Gleixner wrote:
>>> static inline void avecintc_enable(void)
>>> {
>>> +#ifdef CONFIG_MACH_LOONGSON64
>>> u64 value;
>>>
>>> value = iocsr_read64(LOONGARCH_IOCSR_MISC_FUNC);
>>> value |= IOCSR_MISC_FUNC_AVEC_EN;
>>> iocsr_write64(value, LOONGARCH_IOCSR_MISC_FUNC);
>>> +#endif
>>
>> Can't this be:
>>
>> if (IS_ENABLED(CONFIG_MACH_LOONGSON64))
>>
>> which is preferred over ifdeffery?
>
> Sadly, iocsr_read64 symbol is only available on 64 bit systems,
> so it must be guarded somehow.
It's unconditionally defined so using IS_ENABLED() is fine because the
compiler optimizes everything out before the resolv stage.
Thanks,
tglx
On Sat, Jan 10, 2026 at 4:37 AM Thomas Gleixner <tglx@kernel.org> wrote:
>
> On Fri, Jan 09 2026 at 12:23, Jiaxun Yang wrote:
> > On Fri, 9 Jan 2026, at 12:09 PM, Thomas Gleixner wrote:
> >>> static inline void avecintc_enable(void)
> >>> {
> >>> +#ifdef CONFIG_MACH_LOONGSON64
> >>> u64 value;
> >>>
> >>> value = iocsr_read64(LOONGARCH_IOCSR_MISC_FUNC);
> >>> value |= IOCSR_MISC_FUNC_AVEC_EN;
> >>> iocsr_write64(value, LOONGARCH_IOCSR_MISC_FUNC);
> >>> +#endif
> >>
> >> Can't this be:
> >>
> >> if (IS_ENABLED(CONFIG_MACH_LOONGSON64))
> >>
> >> which is preferred over ifdeffery?
> >
> > Sadly, iocsr_read64 symbol is only available on 64 bit systems,
> > so it must be guarded somehow.
>
> It's unconditionally defined so using IS_ENABLED() is fine because the
> compiler optimizes everything out before the resolv stage.
I'm sorry but IS_ENABLED() doesn't work in this case. Because
iocsr_read64() is not a regular function but a compiler intrinsic, it
is handled in the pre-process stage, so still causes build errors.
Please ignore my V2 and I will re-send V3, thanks.
Huacai
>
> Thanks,
>
> tglx
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