drivers/gpu/drm/imagination/pvr_rogue_fwif.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
The build fails on RISC-V using GCC because `SIZE_CHECK(struct
rogue_fwif_hwrtdata, 384)` expects 384 bytes, but the compiler generates
a 336-byte structure.
This is due to an alignment conflict: the inner member `cleanup_state`
requires 64-byte alignment, but the outer struct is explicitly marked
`__aligned(8)`.
While GCC on ARM64 implicitly pads the size to a multiple of 64, GCC on
RISC-V strictly respects the 8-byte outer alignment, resulting in a size
mismatch.
Fix this by aligning the entire structure to 64 bytes, which resolves
the contradiction and forces the correct 384 byte size on all
architectures.
Fixes: a26f067feac1 ("drm/imagination: Add FWIF headers")
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202512131851.1WNXk3BC-lkp@intel.com/
Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com>
---
drivers/gpu/drm/imagination/pvr_rogue_fwif.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/imagination/pvr_rogue_fwif.h b/drivers/gpu/drm/imagination/pvr_rogue_fwif.h
index 172886be4c820a32ae1b08d62bf0814250f2a9bd..1ba2a167a38b31911e0846923e4dc70626f5ca65 100644
--- a/drivers/gpu/drm/imagination/pvr_rogue_fwif.h
+++ b/drivers/gpu/drm/imagination/pvr_rogue_fwif.h
@@ -2170,7 +2170,7 @@ struct rogue_fwif_hwrtdata {
bool geom_caches_need_zeroing __aligned(4);
struct rogue_fwif_cleanup_ctl cleanup_state __aligned(64);
-} __aligned(8);
+} __aligned(64);
/*
******************************************************************************
---
base-commit: 8f0b4cce4481fb22653697cced8d0d04027cb1e8
change-id: 20251222-fix_imagination-8ef0c94122c4
Best regards,
--
Michal Wilczynski <m.wilczynski@samsung.com>
On 22/12/2025 22:53, Michal Wilczynski wrote:
> The build fails on RISC-V using GCC because `SIZE_CHECK(struct
> rogue_fwif_hwrtdata, 384)` expects 384 bytes, but the compiler generates
> a 336-byte structure.
>
> This is due to an alignment conflict: the inner member `cleanup_state`
> requires 64-byte alignment, but the outer struct is explicitly marked
> `__aligned(8)`.
>
> While GCC on ARM64 implicitly pads the size to a multiple of 64, GCC on
> RISC-V strictly respects the 8-byte outer alignment, resulting in a size
> mismatch.
>
> Fix this by aligning the entire structure to 64 bytes, which resolves
> the contradiction and forces the correct 384 byte size on all
> architectures.
>
> Fixes: a26f067feac1 ("drm/imagination: Add FWIF headers")
> Reported-by: kernel test robot <lkp@intel.com>
> Closes: https://lore.kernel.org/oe-kbuild-all/202512131851.1WNXk3BC-lkp@intel.com/
> Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com>
Hi Michal,
This looks fine to me. I'm surprised the behaviour of GCC differs by
architecture though, is there a bug somewhere or is it UB to explicitly
narrow the alignment like this? Either way:
Reviewed-by: Matt Coster <matt.coster@imgtec.com>
And I'll take via drm-misc-fixes tomorrow.
Cheers,
Matt
> ---
> drivers/gpu/drm/imagination/pvr_rogue_fwif.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/imagination/pvr_rogue_fwif.h b/drivers/gpu/drm/imagination/pvr_rogue_fwif.h
> index 172886be4c820a32ae1b08d62bf0814250f2a9bd..1ba2a167a38b31911e0846923e4dc70626f5ca65 100644
> --- a/drivers/gpu/drm/imagination/pvr_rogue_fwif.h
> +++ b/drivers/gpu/drm/imagination/pvr_rogue_fwif.h
> @@ -2170,7 +2170,7 @@ struct rogue_fwif_hwrtdata {
> bool geom_caches_need_zeroing __aligned(4);
>
> struct rogue_fwif_cleanup_ctl cleanup_state __aligned(64);
> -} __aligned(8);
> +} __aligned(64);
>
> /*
> ******************************************************************************
>
> ---
> base-commit: 8f0b4cce4481fb22653697cced8d0d04027cb1e8
> change-id: 20251222-fix_imagination-8ef0c94122c4
>
> Best regards,
--
Matt Coster
E: matt.coster@imgtec.com
Hi Michal,
kernel test robot noticed the following build warnings:
[auto build test WARNING on 8f0b4cce4481fb22653697cced8d0d04027cb1e8]
url: https://github.com/intel-lab-lkp/linux/commits/Michal-Wilczynski/drm-imagination-Align-rogue_fwif_hwrtdata-to-64-bytes/20251223-065827
base: 8f0b4cce4481fb22653697cced8d0d04027cb1e8
patch link: https://lore.kernel.org/r/20251222-fix_imagination-v1-1-0ac80a2ff317%40samsung.com
patch subject: [PATCH] drm/imagination: Align rogue_fwif_hwrtdata to 64 bytes
config: arm64-randconfig-r113-20251224 (https://download.01.org/0day-ci/archive/20251224/202512241051.keF0EcdF-lkp@intel.com/config)
compiler: aarch64-linux-gcc (GCC) 11.5.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251224/202512241051.keF0EcdF-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202512241051.keF0EcdF-lkp@intel.com/
sparse warnings: (new ones prefixed by >>)
>> drivers/gpu/drm/imagination/pvr_power.c:62:16: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const volatile [noderef] __iomem *addr @@ got unsigned int [usertype] *power_sync @@
drivers/gpu/drm/imagination/pvr_power.c:62:16: sparse: expected void const volatile [noderef] __iomem *addr
drivers/gpu/drm/imagination/pvr_power.c:62:16: sparse: got unsigned int [usertype] *power_sync
vim +62 drivers/gpu/drm/imagination/pvr_power.c
cc1aeedb98ad34 Sarah Walker 2023-11-22 46
727538a4bbff07 Sarah Walker 2023-11-22 47 static int
727538a4bbff07 Sarah Walker 2023-11-22 48 pvr_power_send_command(struct pvr_device *pvr_dev, struct rogue_fwif_kccb_cmd *pow_cmd)
727538a4bbff07 Sarah Walker 2023-11-22 49 {
cc1aeedb98ad34 Sarah Walker 2023-11-22 50 struct pvr_fw_device *fw_dev = &pvr_dev->fw_dev;
cc1aeedb98ad34 Sarah Walker 2023-11-22 51 u32 slot_nr;
cc1aeedb98ad34 Sarah Walker 2023-11-22 52 u32 value;
cc1aeedb98ad34 Sarah Walker 2023-11-22 53 int err;
cc1aeedb98ad34 Sarah Walker 2023-11-22 54
cc1aeedb98ad34 Sarah Walker 2023-11-22 55 WRITE_ONCE(*fw_dev->power_sync, 0);
cc1aeedb98ad34 Sarah Walker 2023-11-22 56
cc1aeedb98ad34 Sarah Walker 2023-11-22 57 err = pvr_kccb_send_cmd_powered(pvr_dev, pow_cmd, &slot_nr);
cc1aeedb98ad34 Sarah Walker 2023-11-22 58 if (err)
cc1aeedb98ad34 Sarah Walker 2023-11-22 59 return err;
cc1aeedb98ad34 Sarah Walker 2023-11-22 60
cc1aeedb98ad34 Sarah Walker 2023-11-22 61 /* Wait for FW to acknowledge. */
cc1aeedb98ad34 Sarah Walker 2023-11-22 @62 return readl_poll_timeout(pvr_dev->fw_dev.power_sync, value, value != 0, 100,
cc1aeedb98ad34 Sarah Walker 2023-11-22 63 POWER_SYNC_TIMEOUT_US);
727538a4bbff07 Sarah Walker 2023-11-22 64 }
727538a4bbff07 Sarah Walker 2023-11-22 65
--
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