[v1] spi: cadence-qspi: Add Renesas RZ/N1 support

[PATCH 05/13] spi: cadence-qspi: Remove an useless operation

Posted by Miquel Raynal (Schneider Electric) 1 month, 3 weeks ago

Right above writing the register value back based on 'div' value, there
is the following check:

    if (div > CQSPI_REG_CONFIG_BAUD_MASK)
            div = CQSPI_REG_CONFIG_BAUD_MASK;

which means div does not need to be AND'ed against the bitfield mask.

Remove this redundant operation.

Signed-off-by: Miquel Raynal (Schneider Electric) <miquel.raynal@bootlin.com>
---
 drivers/spi/spi-cadence-quadspi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
index 143904514736..8f78d1c44663 100644
--- a/drivers/spi/spi-cadence-quadspi.c
+++ b/drivers/spi/spi-cadence-quadspi.c
@@ -1264,7 +1264,7 @@ static void cqspi_config_baudrate_div(struct cqspi_st *cqspi)
 
 	reg = readl(reg_base + CQSPI_REG_CONFIG);
 	reg &= ~(CQSPI_REG_CONFIG_BAUD_MASK << CQSPI_REG_CONFIG_BAUD_LSB);
-	reg |= (div & CQSPI_REG_CONFIG_BAUD_MASK) << CQSPI_REG_CONFIG_BAUD_LSB;
+	reg |= div << CQSPI_REG_CONFIG_BAUD_LSB;
 	writel(reg, reg_base + CQSPI_REG_CONFIG);
 }
 

-- 
2.51.1

Re: [PATCH 05/13] spi: cadence-qspi: Remove an useless operation

Posted by Pratyush Yadav 1 month, 2 weeks ago

On Fri, Dec 19 2025, Miquel Raynal (Schneider Electric) wrote:

> Right above writing the register value back based on 'div' value, there
> is the following check:
>
>     if (div > CQSPI_REG_CONFIG_BAUD_MASK)
>             div = CQSPI_REG_CONFIG_BAUD_MASK;
>
> which means div does not need to be AND'ed against the bitfield mask.
>
> Remove this redundant operation.
>
> Signed-off-by: Miquel Raynal (Schneider Electric) <miquel.raynal@bootlin.com>

Reviewed-by: Pratyush Yadav <pratyush@kernel.org>

[...]

-- 
Regards,
Pratyush Yadav