Add support for MDSS on Milos.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
drivers/gpu/drm/msm/msm_mdss.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index 2d0e3e784c04..aa63c079d730 100644
--- a/drivers/gpu/drm/msm/msm_mdss.c
+++ b/drivers/gpu/drm/msm/msm_mdss.c
@@ -535,6 +535,10 @@ static void mdss_remove(struct platform_device *pdev)
msm_mdss_destroy(mdss);
}
+static const struct msm_mdss_data data_14k = {
+ .reg_bus_bw = 14000,
+};
+
static const struct msm_mdss_data data_57k = {
.reg_bus_bw = 57000,
};
@@ -553,6 +557,7 @@ static const struct msm_mdss_data data_153k6 = {
static const struct of_device_id mdss_dt_match[] = {
{ .compatible = "qcom,mdss", .data = &data_153k6 },
+ { .compatible = "qcom,milos-mdss", .data = &data_14k },
{ .compatible = "qcom,msm8998-mdss", .data = &data_76k8 },
{ .compatible = "qcom,qcm2290-mdss", .data = &data_76k8 },
{ .compatible = "qcom,sa8775p-mdss", .data = &data_74k },
--
2.52.0
On Fri, Dec 19, 2025 at 05:41:09PM +0100, Luca Weiss wrote: > Add support for MDSS on Milos. > > Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> > --- > drivers/gpu/drm/msm/msm_mdss.c | 5 +++++ > 1 file changed, 5 insertions(+) > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Though 14000 seems lower than the value for all other platforms. -- With best wishes Dmitry
On 12/20/25 5:52 PM, Dmitry Baryshkov wrote: > On Fri, Dec 19, 2025 at 05:41:09PM +0100, Luca Weiss wrote: >> Add support for MDSS on Milos. >> >> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> >> --- >> drivers/gpu/drm/msm/msm_mdss.c | 5 +++++ >> 1 file changed, 5 insertions(+) >> > > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> > > Though 14000 seems lower than the value for all other platforms. IIUC it's essentially "nonzero" or "first-level-above-just-nonzero" The downstream DT also defines a 140_000 and a 310_000 point.. though the middle one is never(?) used and the latter one is only used during UEFI handoff and upon the first commit after (runtime) resume Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Konrad
On 22/12/2025 11:09, Konrad Dybcio wrote: > On 12/20/25 5:52 PM, Dmitry Baryshkov wrote: >> On Fri, Dec 19, 2025 at 05:41:09PM +0100, Luca Weiss wrote: >>> Add support for MDSS on Milos. >>> >>> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> >>> --- >>> drivers/gpu/drm/msm/msm_mdss.c | 5 +++++ >>> 1 file changed, 5 insertions(+) >>> >> >> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> >> >> Though 14000 seems lower than the value for all other platforms. > > IIUC it's essentially "nonzero" or "first-level-above-just-nonzero" > > The downstream DT also defines a 140_000 and a 310_000 point.. though > the middle one is never(?) used and the latter one is only used during > UEFI handoff and upon the first commit after (runtime) resume If I remember correctly, those are also used for programming the LUTs or other big tables into the hardware. > > Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> > > Konrad -- With best wishes Dmitry
On 12/22/25 10:12 AM, Dmitry Baryshkov wrote: > On 22/12/2025 11:09, Konrad Dybcio wrote: >> On 12/20/25 5:52 PM, Dmitry Baryshkov wrote: >>> On Fri, Dec 19, 2025 at 05:41:09PM +0100, Luca Weiss wrote: >>>> Add support for MDSS on Milos. >>>> >>>> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> >>>> --- >>>> drivers/gpu/drm/msm/msm_mdss.c | 5 +++++ >>>> 1 file changed, 5 insertions(+) >>>> >>> >>> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> >>> >>> Though 14000 seems lower than the value for all other platforms. >> >> IIUC it's essentially "nonzero" or "first-level-above-just-nonzero" >> >> The downstream DT also defines a 140_000 and a 310_000 point.. though >> the middle one is never(?) used and the latter one is only used during >> UEFI handoff and upon the first commit after (runtime) resume > > If I remember correctly, those are also used for programming the LUTs or other big tables into the hardware. FWIW this is an interconnect path for non-DMA accesses so that only makes sense - huge writes could overwhelm the bus Konrad
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