Fixes for movable pages

[PATCH 1/3] hyperv: add definitions for arm64 gpa intercepts

Posted by Anirudh Rayabharam 2 days, 9 hours ago

From: Anirudh Rayabharam (Microsoft) <anirudh@anirudhrb.com>

Add definitions required for handling GPA intercepts on arm64.

Signed-off-by: Anirudh Rayabharam (Microsoft) <anirudh@anirudhrb.com>
---
 include/hyperv/hvhdk.h | 47 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 47 insertions(+)

diff --git a/include/hyperv/hvhdk.h b/include/hyperv/hvhdk.h
index 469186df7826..a286f75f0afa 100644
--- a/include/hyperv/hvhdk.h
+++ b/include/hyperv/hvhdk.h
@@ -800,6 +800,53 @@ struct hv_x64_memory_intercept_message {
 	u8 instruction_bytes[16];
 } __packed;
 
+#if IS_ENABLED(CONFIG_ARM64)
+union hv_arm64_vp_execution_state {
+	u16 as_uint16;
+	struct {
+		u16 cpl:2;
+		u16 debug_active:1;
+		u16 interruption_pending:1;
+		u16 vtl:4;
+		u16 virtualization_fault_active:1;
+		u16 reserved:7;
+	} __packed;
+};
+
+struct hv_arm64_intercept_message_header {
+	u32 vp_index;
+	u8 instruction_length;
+	u8 intercept_access_type;
+	union hv_arm64_vp_execution_state execution_state;
+	u64 pc;
+	u64 cpsr;
+} __packed;
+
+union hv_arm64_memory_access_info {
+	u8 as_uint8;
+	struct {
+		u8 gva_valid:1;
+		u8 gva_gpa_valid:1;
+		u8 hypercall_output_pending:1;
+		u8 reserved:5;
+	} __packed;
+};
+
+struct hv_arm64_memory_intercept_message {
+	struct hv_arm64_intercept_message_header header;
+	u32 cache_type; /* enum hv_cache_type */
+	u8 instruction_byte_count;
+	union hv_arm64_memory_access_info memory_access_info;
+	u16 reserved1;
+	u8 instruction_bytes[4];
+	u32 reserved2;
+	u64 guest_virtual_address;
+	u64 guest_physical_address;
+	u64 syndrome;
+} __packed;
+
+#endif /* CONFIG_ARM64 */
+
 /*
  * Dispatch state for the VP communicated by the hypervisor to the
  * VP-dispatching thread in the root on return from HVCALL_DISPATCH_VP.
-- 
2.34.1

Re: [PATCH 1/3] hyperv: add definitions for arm64 gpa intercepts

Posted by vdso@mailbox.org 2 days, 8 hours ago

> On 12/16/2025 6:20 AM  Anirudh Rayabharam <anirudh@anirudhrb.com> wrote:

[...]

> +#if IS_ENABLED(CONFIG_ARM64)
> +union hv_arm64_vp_execution_state {
> +	u16 as_uint16;
> +	struct {
> +		u16 cpl:2;

That looks oddly x86(-64)-specific (Current Priviledge Level).

Unless I'm mistaken, CPL doesn't belong here, and the bitfield isn't
used on ARM64. Provided the layout of the struct is correct, the
bitfield can have a better name of `reserved0` or something like that.

> +		u16 debug_active:1;
> +		u16 interruption_pending:1;
> +		u16 vtl:4;
> +		u16 virtualization_fault_active:1;
> +		u16 reserved:7;
> +	} __packed;

Re: [PATCH 1/3] hyperv: add definitions for arm64 gpa intercepts

Posted by Anirudh Rayabharam 1 day, 18 hours ago

On Tue, Dec 16, 2025 at 07:07:45AM -0800, vdso@mailbox.org wrote:
> 
> > On 12/16/2025 6:20 AM  Anirudh Rayabharam <anirudh@anirudhrb.com> wrote:
> 
> [...]
> 
> > +#if IS_ENABLED(CONFIG_ARM64)
> > +union hv_arm64_vp_execution_state {
> > +	u16 as_uint16;
> > +	struct {
> > +		u16 cpl:2;
> 
> That looks oddly x86(-64)-specific (Current Priviledge Level).
> 
> Unless I'm mistaken, CPL doesn't belong here, and the bitfield isn't
> used on ARM64. Provided the layout of the struct is correct, the
> bitfield can have a better name of `reserved0` or something like that.

Hmmm... this is how it is defined in the hypervisor headers though.

Anirudh.

Re: [PATCH 1/3] hyperv: add definitions for arm64 gpa intercepts

Posted by Wei Liu 3 hours ago

On Wed, Dec 17, 2025 at 10:38:47AM +0530, Anirudh Rayabharam wrote:
> On Tue, Dec 16, 2025 at 07:07:45AM -0800, vdso@mailbox.org wrote:
> > 
> > > On 12/16/2025 6:20 AM  Anirudh Rayabharam <anirudh@anirudhrb.com> wrote:
> > 
> > [...]
> > 
> > > +#if IS_ENABLED(CONFIG_ARM64)
> > > +union hv_arm64_vp_execution_state {
> > > +	u16 as_uint16;
> > > +	struct {
> > > +		u16 cpl:2;
> > 
> > That looks oddly x86(-64)-specific (Current Priviledge Level).
> > 
> > Unless I'm mistaken, CPL doesn't belong here, and the bitfield isn't
> > used on ARM64. Provided the layout of the struct is correct, the
> > bitfield can have a better name of `reserved0` or something like that.
> 
> Hmmm... this is how it is defined in the hypervisor headers though.

We should ask the hypervisor folks then. Once this gets out in the wild
it will be difficult to change.

Wei

> 
> Anirudh.

Re: [PATCH 1/3] hyperv: add definitions for arm64 gpa intercepts

Posted by vdso@mailbox.org 1 day, 17 hours ago

> On 12/16/2025 9:08 PM  Anirudh Rayabharam <anirudh@anirudhrb.com> wrote:
> 
>  
> On Tue, Dec 16, 2025 at 07:07:45AM -0800, vdso@mailbox.org wrote:
> > 
> > > On 12/16/2025 6:20 AM  Anirudh Rayabharam <anirudh@anirudhrb.com> wrote:
> > 
> > [...]
> > 
> > > +#if IS_ENABLED(CONFIG_ARM64)
> > > +union hv_arm64_vp_execution_state {
> > > +	u16 as_uint16;
> > > +	struct {
> > > +		u16 cpl:2;
> > 
> > That looks oddly x86(-64)-specific (Current Priviledge Level).
> > 
> > Unless I'm mistaken, CPL doesn't belong here, and the bitfield isn't
> > used on ARM64. Provided the layout of the struct is correct, the
> > bitfield can have a better name of `reserved0` or something like that.
> 
> Hmmm... this is how it is defined in the hypervisor headers though.

The questions would be why the hypervisor has got that there (e.g., the
definitions of that struct for x86 and ARM64 are merged), and if Linux needs
to care about the reason valid in the hv's codebase. Perhaps the definitions
are merged there to write less arch-specific code, similar to what Stas suggested
for the patch 2.

I haven't been able to find anything called CPL in the ARM64 arch docs, and
that field really sticks out as the x86-64's CPL. Naming it like that in an
ARM64-specific structure doesn't look justified.