Add compatible string for the SpacemiT X100 (RVA23 compliant) core.
Link: https://www.spacemit.com/en/spacemit-x100-core/
Signed-off-by: Guodong Xu <guodong@riscstar.com>
---
Documentation/devicetree/bindings/riscv/cpus.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml
index d733c0bd534fb63ed7c0eada97c42832431f1fc1..cce87092dc7749f49066154d9a256af6c7b6c19f 100644
--- a/Documentation/devicetree/bindings/riscv/cpus.yaml
+++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
@@ -62,6 +62,7 @@ properties:
- sifive,u74
- sifive,u74-mc
- spacemit,x60
+ - spacemit,x100
- thead,c906
- thead,c908
- thead,c910
--
2.43.0
On 16/12/2025 14:32, Guodong Xu wrote: > Add compatible string for the SpacemiT X100 (RVA23 compliant) core. > > Link: https://www.spacemit.com/en/spacemit-x100-core/ > > Signed-off-by: Guodong Xu <guodong@riscstar.com> > --- > Documentation/devicetree/bindings/riscv/cpus.yaml | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml > index d733c0bd534fb63ed7c0eada97c42832431f1fc1..cce87092dc7749f49066154d9a256af6c7b6c19f 100644 > --- a/Documentation/devicetree/bindings/riscv/cpus.yaml > +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml > @@ -62,6 +62,7 @@ properties: > - sifive,u74 > - sifive,u74-mc > - spacemit,x60 > + - spacemit,x100 Two reviews of this one-liner but no one pointed out that sorting is broken... What is being exactly reviewed in this one-liner? Best regards, Krzysztof
On Tue, Dec 16, 2025 at 11:33 PM Krzysztof Kozlowski <krzk@kernel.org> wrote: > > On 16/12/2025 14:32, Guodong Xu wrote: > > Add compatible string for the SpacemiT X100 (RVA23 compliant) core. > > > > Link: https://www.spacemit.com/en/spacemit-x100-core/ > > > > Signed-off-by: Guodong Xu <guodong@riscstar.com> > > --- > > Documentation/devicetree/bindings/riscv/cpus.yaml | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml > > index d733c0bd534fb63ed7c0eada97c42832431f1fc1..cce87092dc7749f49066154d9a256af6c7b6c19f 100644 > > --- a/Documentation/devicetree/bindings/riscv/cpus.yaml > > +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml > > @@ -62,6 +62,7 @@ properties: > > - sifive,u74 > > - sifive,u74-mc > > - spacemit,x60 > > + - spacemit,x100 > > > Two reviews of this one-liner but no one pointed out that sorting is > broken... What is being exactly reviewed in this one-liner? Thanks Krzysztof. I will fix that, put x100 before x60. BR, Guodong > > Best regards, > Krzysztof
Hi Guodong, On 21:32 Tue 16 Dec , Guodong Xu wrote: > Add compatible string for the SpacemiT X100 (RVA23 compliant) core. > > Link: https://www.spacemit.com/en/spacemit-x100-core/ it would be better if you can put more description into commit message as I don't trust the link too much, it may vanish or change in the future?.. besides, if I remember correctly, there are still few optional extensions that not supported by x100, it's worth to list here to let community know.. > > Signed-off-by: Guodong Xu <guodong@riscstar.com> > --- > Documentation/devicetree/bindings/riscv/cpus.yaml | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml > index d733c0bd534fb63ed7c0eada97c42832431f1fc1..cce87092dc7749f49066154d9a256af6c7b6c19f 100644 > --- a/Documentation/devicetree/bindings/riscv/cpus.yaml > +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml > @@ -62,6 +62,7 @@ properties: > - sifive,u74 > - sifive,u74-mc > - spacemit,x60 > + - spacemit,x100 > - thead,c906 > - thead,c908 > - thead,c910 > > -- > 2.43.0 > -- Yixun Lan (dlan)
On Tue, Dec 16, 2025 at 11:16 PM Yixun Lan <dlan@gentoo.org> wrote: > > Hi Guodong, > > On 21:32 Tue 16 Dec , Guodong Xu wrote: > > Add compatible string for the SpacemiT X100 (RVA23 compliant) core. > > > > Link: https://www.spacemit.com/en/spacemit-x100-core/ > it would be better if you can put more description into commit message > as I don't trust the link too much, it may vanish or change in the future?.. Thanks Yixun for the feedback. I understand your concerns. I will expand the commit message with more information about X100 core features so we don't rely solely on the link. > > besides, if I remember correctly, there are still few optional > extensions that not supported by x100, it's worth to list here to > let community know.. I would prefer not to list the unsupported optional extensions explicitly. Basically there are two reasons. Since the RISC-V specification includes a vast number of optional extensions, and they are categorized in four groups (localized options, develpment options, expansion options, and transitory options), listing everything not supported would be quite lengthy IMHO. Secondly, looking at previous commits for other RISC-V CPUs, it doesn't seem to be the convention to list unsupported extensions. I will expand the commit message to state X100 supports all _mandatory_ extensions per defined by the RVA23 profile. I hope this approach is acceptable. BR, Guodong > > > > > Signed-off-by: Guodong Xu <guodong@riscstar.com> > > --- > > Documentation/devicetree/bindings/riscv/cpus.yaml | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml > > index d733c0bd534fb63ed7c0eada97c42832431f1fc1..cce87092dc7749f49066154d9a256af6c7b6c19f 100644 > > --- a/Documentation/devicetree/bindings/riscv/cpus.yaml > > +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml > > @@ -62,6 +62,7 @@ properties: > > - sifive,u74 > > - sifive,u74-mc > > - spacemit,x60 > > + - spacemit,x100 > > - thead,c906 > > - thead,c908 > > - thead,c910 > > > > -- > > 2.43.0 > > > > -- > Yixun Lan (dlan)
Hi Guodong, On 21:32 Tue 16 Dec , Guodong Xu wrote: > Add compatible string for the SpacemiT X100 (RVA23 compliant) core. > > Link: https://www.spacemit.com/en/spacemit-x100-core/ > no blank line here > Signed-off-by: Guodong Xu <guodong@riscstar.com> with that fixed Reviewed-by: Yixun Lan <dlan@gentoo.org> -- Yixun Lan (dlan)
On Tue, Dec 16, 2025 at 11:07 PM Yixun Lan <dlan@gentoo.org> wrote: > > Hi Guodong, > > On 21:32 Tue 16 Dec , Guodong Xu wrote: > > Add compatible string for the SpacemiT X100 (RVA23 compliant) core. > > > > Link: https://www.spacemit.com/en/spacemit-x100-core/ > > > no blank line here I will fix that. > > Signed-off-by: Guodong Xu <guodong@riscstar.com> > > with that fixed > Reviewed-by: Yixun Lan <dlan@gentoo.org> Thanks Yixun. > > -- > Yixun Lan (dlan)
On 12/16/25 14:32, Guodong Xu wrote: > Add compatible string for the SpacemiT X100 (RVA23 compliant) core. > > Link: https://www.spacemit.com/en/spacemit-x100-core/ > > Signed-off-by: Guodong Xu <guodong@riscstar.com> LGTM Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> > --- > Documentation/devicetree/bindings/riscv/cpus.yaml | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml > index d733c0bd534fb63ed7c0eada97c42832431f1fc1..cce87092dc7749f49066154d9a256af6c7b6c19f 100644 > --- a/Documentation/devicetree/bindings/riscv/cpus.yaml > +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml > @@ -62,6 +62,7 @@ properties: > - sifive,u74 > - sifive,u74-mc > - spacemit,x60 > + - spacemit,x100 > - thead,c906 > - thead,c908 > - thead,c910 >
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