On Mon, 15 Dec 2025 at 04:50, irving.ch.lin <irving-ch.lin@mediatek.com> wrote:
>
> From: Irving-CH Lin <irving-ch.lin@mediatek.com>
>
> Changes since v4:
> - Fix dt_binding_check warning.
> - Check prepare_enable before set_parent to ensure our reference clock is ready.
> - Enable fhctl in apmixed driver.
> - Refine clock drivers:
> - Change subsys name, regs base/size (clock related part, instead of whole subsys).
> - Simply code with GATE_MTK macro.
> - Add MODULE_DEVICE_TABLE, MODULE_DESCRIPTION
> - Register remove callback mtk_clk_simple_remove.
> - Remove most of CLK_OPS_PARENT_ENABLE and CLK_IGNORE_UNUSED which may block bringup,
> but some subsys will power off before we disable unused clocks, so still need here.
I assume I can pick the pmdomain related changes (patch2, patch20 and
patch21) from this series, as they are independent from the clock
changes, right?
Kind regards
Uffe
>
> changes since v3:
> - Add power-controller dt-schema to mediatek,power-controller.yaml.
> - Separates clock commit to small parts (by sub-system).
> - Change to mtk-pm-domains for new MTK pm framework.
>
> changes since v2:
> - Fix dt-schema checking fails
> - Merge dt-binding files and dt-schema files into one patch.
> - Add vendor information to dt-binding file name.
> - Remove NR define in dt-binding header.
> - Add struct member description.
>
> This series add support for the clock and power controllers
> of MediaTek's new SoC, MT8189. With these changes,
> other modules can easily manage clock and power resources
> using standard Linux APIs, such as the Common Clock Framework (CCF)
> and pm_runtime on MT8189 platform.
>
> Irving-CH Lin (21):
> dt-bindings: clock: mediatek: Add MT8189 clock definitions
> dt-bindings: power: mediatek: Add MT8189 power domain definitions
> clk: mediatek: clk-mux: Make sure bypass clk enabled while setting MFG
> rate
> clk: mediatek: Add MT8189 apmixedsys clock support
> clk: mediatek: Add MT8189 topckgen clock support
> clk: mediatek: Add MT8189 vlpckgen clock support
> clk: mediatek: Add MT8189 vlpcfg clock support
> clk: mediatek: Add MT8189 bus clock support
> clk: mediatek: Add MT8189 cam clock support
> clk: mediatek: Add MT8189 dbgao clock support
> clk: mediatek: Add MT8189 dvfsrc clock support
> clk: mediatek: Add MT8189 i2c clock support
> clk: mediatek: Add MT8189 img clock support
> clk: mediatek: Add MT8189 mdp clock support
> clk: mediatek: Add MT8189 mfg clock support
> clk: mediatek: Add MT8189 dispsys clock support
> clk: mediatek: Add MT8189 scp clock support
> clk: mediatek: Add MT8189 ufs clock support
> clk: mediatek: Add MT8189 vcodec clock support
> pmdomain: mediatek: Add bus protect control flow for MT8189
> pmdomain: mediatek: Add power domain driver for MT8189 SoC
>
> .../bindings/clock/mediatek,mt8189-clock.yaml | 90 ++
> .../clock/mediatek,mt8189-sys-clock.yaml | 58 +
> .../power/mediatek,power-controller.yaml | 1 +
> drivers/clk/mediatek/Kconfig | 146 +++
> drivers/clk/mediatek/Makefile | 14 +
> drivers/clk/mediatek/clk-mt8189-apmixedsys.c | 192 ++++
> drivers/clk/mediatek/clk-mt8189-bus.c | 196 ++++
> drivers/clk/mediatek/clk-mt8189-cam.c | 108 ++
> drivers/clk/mediatek/clk-mt8189-dbgao.c | 94 ++
> drivers/clk/mediatek/clk-mt8189-dispsys.c | 172 +++
> drivers/clk/mediatek/clk-mt8189-dvfsrc.c | 54 +
> drivers/clk/mediatek/clk-mt8189-iic.c | 118 ++
> drivers/clk/mediatek/clk-mt8189-img.c | 107 ++
> drivers/clk/mediatek/clk-mt8189-mdpsys.c | 91 ++
> drivers/clk/mediatek/clk-mt8189-mfg.c | 53 +
> drivers/clk/mediatek/clk-mt8189-scp.c | 73 ++
> drivers/clk/mediatek/clk-mt8189-topckgen.c | 1020 +++++++++++++++++
> drivers/clk/mediatek/clk-mt8189-ufs.c | 89 ++
> drivers/clk/mediatek/clk-mt8189-vcodec.c | 93 ++
> drivers/clk/mediatek/clk-mt8189-vlpcfg.c | 111 ++
> drivers/clk/mediatek/clk-mt8189-vlpckgen.c | 280 +++++
> drivers/clk/mediatek/clk-mux.c | 9 +-
> drivers/pmdomain/mediatek/mt8189-pm-domains.h | 485 ++++++++
> drivers/pmdomain/mediatek/mtk-pm-domains.c | 36 +-
> drivers/pmdomain/mediatek/mtk-pm-domains.h | 5 +
> .../dt-bindings/clock/mediatek,mt8189-clk.h | 580 ++++++++++
> .../dt-bindings/power/mediatek,mt8189-power.h | 38 +
> 27 files changed, 4306 insertions(+), 7 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/clock/mediatek,mt8189-clock.yaml
> create mode 100644 Documentation/devicetree/bindings/clock/mediatek,mt8189-sys-clock.yaml
> create mode 100644 drivers/clk/mediatek/clk-mt8189-apmixedsys.c
> create mode 100644 drivers/clk/mediatek/clk-mt8189-bus.c
> create mode 100644 drivers/clk/mediatek/clk-mt8189-cam.c
> create mode 100644 drivers/clk/mediatek/clk-mt8189-dbgao.c
> create mode 100644 drivers/clk/mediatek/clk-mt8189-dispsys.c
> create mode 100644 drivers/clk/mediatek/clk-mt8189-dvfsrc.c
> create mode 100644 drivers/clk/mediatek/clk-mt8189-iic.c
> create mode 100644 drivers/clk/mediatek/clk-mt8189-img.c
> create mode 100644 drivers/clk/mediatek/clk-mt8189-mdpsys.c
> create mode 100644 drivers/clk/mediatek/clk-mt8189-mfg.c
> create mode 100644 drivers/clk/mediatek/clk-mt8189-scp.c
> create mode 100644 drivers/clk/mediatek/clk-mt8189-topckgen.c
> create mode 100644 drivers/clk/mediatek/clk-mt8189-ufs.c
> create mode 100644 drivers/clk/mediatek/clk-mt8189-vcodec.c
> create mode 100644 drivers/clk/mediatek/clk-mt8189-vlpcfg.c
> create mode 100644 drivers/clk/mediatek/clk-mt8189-vlpckgen.c
> create mode 100644 drivers/pmdomain/mediatek/mt8189-pm-domains.h
> create mode 100644 include/dt-bindings/clock/mediatek,mt8189-clk.h
> create mode 100644 include/dt-bindings/power/mediatek,mt8189-power.h
>
> --
> 2.45.2
>