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[PATCH RESEND v3 1/5] clk: Respect CLK_OPS_PARENT_ENABLE during recalc

Nicolas Frattaroli posted 5 patches 1 month, 3 weeks ago
[PATCH RESEND v3 1/5] clk: Respect CLK_OPS_PARENT_ENABLE during recalc
Posted by Nicolas Frattaroli 1 month, 3 weeks ago 
When CLK_OPS_PARENT_ENABLE was introduced, it guarded various clock
operations, such as setting the rate or switching parents. However,
another operation that can and often does touch actual hardware state is
recalc_rate, which may also be affected by such a dependency.

Add parent enables/disables where the recalc_rate op is called directly.

Fixes: fc8726a2c021 ("clk: core: support clocks which requires parents enable (part 2)")
Fixes: a4b3518d146f ("clk: core: support clocks which requires parents enable (part 1)")
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
 drivers/clk/clk.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 85d2f2481acf..1b0f9d567f48 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -1921,7 +1921,14 @@ static unsigned long clk_recalc(struct clk_core *core,
 	unsigned long rate = parent_rate;
 
 	if (core->ops->recalc_rate && !clk_pm_runtime_get(core)) {
+		if (core->flags & CLK_OPS_PARENT_ENABLE)
+			clk_core_prepare_enable(core->parent);
+
 		rate = core->ops->recalc_rate(core->hw, parent_rate);
+
+		if (core->flags & CLK_OPS_PARENT_ENABLE)
+			clk_core_disable_unprepare(core->parent);
+
 		clk_pm_runtime_put(core);
 	}
 	return rate;
@@ -4031,6 +4038,9 @@ static int __clk_core_init(struct clk_core *core)
 	 */
 	clk_core_update_duty_cycle_nolock(core);
 
+	if (core->flags & CLK_OPS_PARENT_ENABLE)
+		clk_core_prepare_enable(core->parent);
+
 	/*
 	 * Set clk's rate.  The preferred method is to use .recalc_rate.  For
 	 * simple clocks and lazy developers the default fallback is to use the
@@ -4046,6 +4056,9 @@ static int __clk_core_init(struct clk_core *core)
 		rate = 0;
 	core->rate = core->req_rate = rate;
 
+	if (core->flags & CLK_OPS_PARENT_ENABLE)
+		clk_core_disable_unprepare(core->parent);
+
 	/*
 	 * Enable CLK_IS_CRITICAL clocks so newly added critical clocks
 	 * don't get accidentally disabled when walking the orphan tree and

-- 
2.52.0
Re: [PATCH RESEND v3 1/5] clk: Respect CLK_OPS_PARENT_ENABLE during recalc
Posted by Stephen Boyd 2 weeks, 4 days ago 
Quoting Nicolas Frattaroli (2025-12-15 03:23:58)
> When CLK_OPS_PARENT_ENABLE was introduced, it guarded various clock
> operations, such as setting the rate or switching parents. However,
> another operation that can and often does touch actual hardware state is
> recalc_rate, which may also be affected by such a dependency.
> 
> Add parent enables/disables where the recalc_rate op is called directly.
> 
> Fixes: fc8726a2c021 ("clk: core: support clocks which requires parents enable (part 2)")
> Fixes: a4b3518d146f ("clk: core: support clocks which requires parents enable (part 1)")
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> ---

Applied to clk-next
Re: [PATCH RESEND v3 1/5] clk: Respect CLK_OPS_PARENT_ENABLE during recalc
Posted by Alexander Stein 1 week, 6 days ago 
Hello,

Am Freitag, 23. Januar 2026, 02:45:33 CET schrieb Stephen Boyd:
> Quoting Nicolas Frattaroli (2025-12-15 03:23:58)
> > When CLK_OPS_PARENT_ENABLE was introduced, it guarded various clock
> > operations, such as setting the rate or switching parents. However,
> > another operation that can and often does touch actual hardware state is
> > recalc_rate, which may also be affected by such a dependency.
> > 
> > Add parent enables/disables where the recalc_rate op is called directly.
> > 
> > Fixes: fc8726a2c021 ("clk: core: support clocks which requires parents enable (part 2)")
> > Fixes: a4b3518d146f ("clk: core: support clocks which requires parents enable (part 1)")
> > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> > Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
> > Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> > ---
> 
> Applied to clk-next

Unfortunately this breaks my board TQMa8MPxL+MBa8MPxL on next-20260126.
Last lines on bootlog (earlycon is necessary)
> [    1.175639] Initialise system trusted keyrings
> [    1.178907] workingset: timestamp_bits=42 max_order=19 bucket_order=0
> [    1.185822] NFS: Registering the id_resolver key type
> [    1.190295] Key type id_resolver registered
> [    1.194473] Key type id_legacy registered
> [    1.198515] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
> [    1.205235] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver
> Registering... [    1.213235] cryptd: max_cpu_qlen set to 1000
> [    1.274689] Key type asymmetric registered
> [    1.275939] Asymmetric key parser 'x509' registered
> [    1.280896] Block layer SCSI generic (bsg) driver version 0.4 loaded
> (major 242) [    1.288278] io scheduler mq-deadline registered
> [    1.292840] io scheduler kyber registered
> [    1.299245] ledtrig-cpu: registered to indicate activity on CPUs

Reverting commit 669917676e93fca5ea3c66fc9539830312bec58e fixes the problem.

Best regards,
Alexander
-- 
TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
Amtsgericht München, HRB 105018
Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
http://www.tq-group.com/
Re: [PATCH RESEND v3 1/5] clk: Respect CLK_OPS_PARENT_ENABLE during recalc
Posted by Nicolas Frattaroli 1 week, 6 days ago 
On Tuesday, 27 January 2026 15:55:29 Central European Standard Time Alexander Stein wrote:
> Hello,
> 
> Am Freitag, 23. Januar 2026, 02:45:33 CET schrieb Stephen Boyd:
> > Quoting Nicolas Frattaroli (2025-12-15 03:23:58)
> > > When CLK_OPS_PARENT_ENABLE was introduced, it guarded various clock
> > > operations, such as setting the rate or switching parents. However,
> > > another operation that can and often does touch actual hardware state is
> > > recalc_rate, which may also be affected by such a dependency.
> > > 
> > > Add parent enables/disables where the recalc_rate op is called directly.
> > > 
> > > Fixes: fc8726a2c021 ("clk: core: support clocks which requires parents enable (part 2)")
> > > Fixes: a4b3518d146f ("clk: core: support clocks which requires parents enable (part 1)")
> > > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> > > Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
> > > Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> > > ---
> > 
> > Applied to clk-next
> 
> Unfortunately this breaks my board TQMa8MPxL+MBa8MPxL on next-20260126.
> Last lines on bootlog (earlycon is necessary)
> > [    1.175639] Initialise system trusted keyrings
> > [    1.178907] workingset: timestamp_bits=42 max_order=19 bucket_order=0
> > [    1.185822] NFS: Registering the id_resolver key type
> > [    1.190295] Key type id_resolver registered
> > [    1.194473] Key type id_legacy registered
> > [    1.198515] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
> > [    1.205235] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver
> > Registering... [    1.213235] cryptd: max_cpu_qlen set to 1000
> > [    1.274689] Key type asymmetric registered
> > [    1.275939] Asymmetric key parser 'x509' registered
> > [    1.280896] Block layer SCSI generic (bsg) driver version 0.4 loaded
> > (major 242) [    1.288278] io scheduler mq-deadline registered
> > [    1.292840] io scheduler kyber registered
> > [    1.299245] ledtrig-cpu: registered to indicate activity on CPUs
> 
> Reverting commit 669917676e93fca5ea3c66fc9539830312bec58e fixes the problem.

Hi Alexander,

sorry for breaking -next.

Can you try the following patch to print which clock+parent is causing
the hang on your platform?

---
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 1b0f9d567f48..fa1443517768 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -1921,13 +1921,21 @@ static unsigned long clk_recalc(struct clk_core *core,
 	unsigned long rate = parent_rate;
 
 	if (core->ops->recalc_rate && !clk_pm_runtime_get(core)) {
-		if (core->flags & CLK_OPS_PARENT_ENABLE)
+		if (core->flags & CLK_OPS_PARENT_ENABLE) {
+			pr_info("%s: enabling parent %s for %s\n", __func__,
+				core->parent ? core->parent->name : "(null)",
+				core->name);
 			clk_core_prepare_enable(core->parent);
+		}
 
 		rate = core->ops->recalc_rate(core->hw, parent_rate);
 
-		if (core->flags & CLK_OPS_PARENT_ENABLE)
+		if (core->flags & CLK_OPS_PARENT_ENABLE) {
+			pr_info("%s: disabling parent %s for %s\n", __func__,
+				core->parent ? core->parent->name : "(null)",
+				core->name);
 			clk_core_disable_unprepare(core->parent);
+		}
 
 		clk_pm_runtime_put(core);
 	}
@@ -4038,8 +4046,12 @@ static int __clk_core_init(struct clk_core *core)
 	 */
 	clk_core_update_duty_cycle_nolock(core);
 
-	if (core->flags & CLK_OPS_PARENT_ENABLE)
+	if (core->flags & CLK_OPS_PARENT_ENABLE) {
+		pr_info("%s: enabling parent %s for %s\n", __func__,
+			core->parent ? core->parent->name : "(null)",
+			core->name);
 		clk_core_prepare_enable(core->parent);
+	}
 
 	/*
 	 * Set clk's rate.  The preferred method is to use .recalc_rate.  For
@@ -4056,8 +4068,12 @@ static int __clk_core_init(struct clk_core *core)
 		rate = 0;
 	core->rate = core->req_rate = rate;
 
-	if (core->flags & CLK_OPS_PARENT_ENABLE)
+	if (core->flags & CLK_OPS_PARENT_ENABLE) {
+		pr_info("%s: disabling parent %s for %s\n", __func__,
+			core->parent ? core->parent->name : "(null)",
+			core->name);
 		clk_core_disable_unprepare(core->parent);
+	}
 
 	/*
 	 * Enable CLK_IS_CRITICAL clocks so newly added critical clocks
---

Thanks for reporting this.

Kind regards,
Nicolas Frattaroli

> 
> Best regards,
> Alexander
>
Re: [PATCH RESEND v3 1/5] clk: Respect CLK_OPS_PARENT_ENABLE during recalc
Posted by Alexander Stein 1 week, 5 days ago 
Hi Nicolas,

Am Mittwoch, 28. Januar 2026, 15:11:33 CET schrieb Nicolas Frattaroli:
> On Tuesday, 27 January 2026 15:55:29 Central European Standard Time Alexander Stein wrote:
> > Hello,
> > 
> > Am Freitag, 23. Januar 2026, 02:45:33 CET schrieb Stephen Boyd:
> > > Quoting Nicolas Frattaroli (2025-12-15 03:23:58)
> > > > When CLK_OPS_PARENT_ENABLE was introduced, it guarded various clock
> > > > operations, such as setting the rate or switching parents. However,
> > > > another operation that can and often does touch actual hardware state is
> > > > recalc_rate, which may also be affected by such a dependency.
> > > > 
> > > > Add parent enables/disables where the recalc_rate op is called directly.
> > > > 
> > > > Fixes: fc8726a2c021 ("clk: core: support clocks which requires parents enable (part 2)")
> > > > Fixes: a4b3518d146f ("clk: core: support clocks which requires parents enable (part 1)")
> > > > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> > > > Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
> > > > Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> > > > ---
> > > 
> > > Applied to clk-next
> > 
> > Unfortunately this breaks my board TQMa8MPxL+MBa8MPxL on next-20260126.
> > Last lines on bootlog (earlycon is necessary)
> > > [    1.175639] Initialise system trusted keyrings
> > > [    1.178907] workingset: timestamp_bits=42 max_order=19 bucket_order=0
> > > [    1.185822] NFS: Registering the id_resolver key type
> > > [    1.190295] Key type id_resolver registered
> > > [    1.194473] Key type id_legacy registered
> > > [    1.198515] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
> > > [    1.205235] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver
> > > Registering... [    1.213235] cryptd: max_cpu_qlen set to 1000
> > > [    1.274689] Key type asymmetric registered
> > > [    1.275939] Asymmetric key parser 'x509' registered
> > > [    1.280896] Block layer SCSI generic (bsg) driver version 0.4 loaded
> > > (major 242) [    1.288278] io scheduler mq-deadline registered
> > > [    1.292840] io scheduler kyber registered
> > > [    1.299245] ledtrig-cpu: registered to indicate activity on CPUs
> > 
> > Reverting commit 669917676e93fca5ea3c66fc9539830312bec58e fixes the problem.
> 
> Hi Alexander,
> 
> sorry for breaking -next.
> 
> Can you try the following patch to print which clock+parent is causing
> the hang on your platform?
> 
> ---
> diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
> index 1b0f9d567f48..fa1443517768 100644
> --- a/drivers/clk/clk.c
> +++ b/drivers/clk/clk.c
> @@ -1921,13 +1921,21 @@ static unsigned long clk_recalc(struct clk_core *core,
>  	unsigned long rate = parent_rate;
>  
>  	if (core->ops->recalc_rate && !clk_pm_runtime_get(core)) {
> -		if (core->flags & CLK_OPS_PARENT_ENABLE)
> +		if (core->flags & CLK_OPS_PARENT_ENABLE) {
> +			pr_info("%s: enabling parent %s for %s\n", __func__,
> +				core->parent ? core->parent->name : "(null)",
> +				core->name);
>  			clk_core_prepare_enable(core->parent);
> +		}
>  
>  		rate = core->ops->recalc_rate(core->hw, parent_rate);
>  
> -		if (core->flags & CLK_OPS_PARENT_ENABLE)
> +		if (core->flags & CLK_OPS_PARENT_ENABLE) {
> +			pr_info("%s: disabling parent %s for %s\n", __func__,
> +				core->parent ? core->parent->name : "(null)",
> +				core->name);
>  			clk_core_disable_unprepare(core->parent);
> +		}
>  
>  		clk_pm_runtime_put(core);
>  	}
> @@ -4038,8 +4046,12 @@ static int __clk_core_init(struct clk_core *core)
>  	 */
>  	clk_core_update_duty_cycle_nolock(core);
>  
> -	if (core->flags & CLK_OPS_PARENT_ENABLE)
> +	if (core->flags & CLK_OPS_PARENT_ENABLE) {
> +		pr_info("%s: enabling parent %s for %s\n", __func__,
> +			core->parent ? core->parent->name : "(null)",
> +			core->name);
>  		clk_core_prepare_enable(core->parent);
> +	}
>  
>  	/*
>  	 * Set clk's rate.  The preferred method is to use .recalc_rate.  For
> @@ -4056,8 +4068,12 @@ static int __clk_core_init(struct clk_core *core)
>  		rate = 0;
>  	core->rate = core->req_rate = rate;
>  
> -	if (core->flags & CLK_OPS_PARENT_ENABLE)
> +	if (core->flags & CLK_OPS_PARENT_ENABLE) {
> +		pr_info("%s: disabling parent %s for %s\n", __func__,
> +			core->parent ? core->parent->name : "(null)",
> +			core->name);
>  		clk_core_disable_unprepare(core->parent);
> +	}
>  
>  	/*
>  	 * Enable CLK_IS_CRITICAL clocks so newly added critical clocks
> ---
> 
> Thanks for reporting this.

thanks for the debugging patch. I'll respond to the other thread where
Mark is active as well.

Best regards,
Alexander

> Kind regards,
> Nicolas Frattaroli
> 
> > 
> > Best regards,
> > Alexander
> > 
> 
> 
> 
> 
> 
> 


-- 
TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
Amtsgericht München, HRB 105018
Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
http://www.tq-group.com/

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