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[PATCH 4/5] openrisc: dts: Split simple smp dts to dts and dtsi

Stafford Horne posted 5 patches 1 day, 13 hours ago
[PATCH 4/5] openrisc: dts: Split simple smp dts to dts and dtsi
Posted by Stafford Horne 1 day, 13 hours ago 
Split out the common memory, CPU and PIC definitions of the simple SMP
system to a DTSI file which we will later use for our De0 Nano multicore
board device tree.  We also take this opportunity to swich underscores
to dashes as that seems to be the more common convention for DTS files.

Signed-off-by: Stafford Horne <shorne@gmail.com>
---
 arch/openrisc/boot/dts/simple-smp.dts         | 25 +++++++++++++++++++
 .../dts/{simple_smp.dts => simple-smp.dtsi}   | 12 ++++-----
 arch/openrisc/configs/simple_smp_defconfig    |  2 +-
 3 files changed, 32 insertions(+), 7 deletions(-)
 create mode 100644 arch/openrisc/boot/dts/simple-smp.dts
 rename arch/openrisc/boot/dts/{simple_smp.dts => simple-smp.dtsi} (89%)

diff --git a/arch/openrisc/boot/dts/simple-smp.dts b/arch/openrisc/boot/dts/simple-smp.dts
new file mode 100644
index 000000000000..174c2613c419
--- /dev/null
+++ b/arch/openrisc/boot/dts/simple-smp.dts
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/dts-v1/;
+
+#include "simple_smp.dtsi"
+
+/ {
+	model = "Simple SMP Board";
+};
+
+&cpu0 {
+	clock-frequency = <20000000>;
+};
+
+&cpu1 {
+	clock-frequency = <20000000>;
+};
+
+&serial0 {
+	clock-frequency = <20000000>;
+};
+
+&enet0 {
+	status = "okay";
+};
diff --git a/arch/openrisc/boot/dts/simple_smp.dts b/arch/openrisc/boot/dts/simple-smp.dtsi
similarity index 89%
rename from arch/openrisc/boot/dts/simple_smp.dts
rename to arch/openrisc/boot/dts/simple-smp.dtsi
index 71af0e117bfe..92770bb6fcf7 100644
--- a/arch/openrisc/boot/dts/simple_smp.dts
+++ b/arch/openrisc/boot/dts/simple-smp.dtsi
@@ -1,4 +1,3 @@
-/dts-v1/;
 / {
 	compatible = "opencores,or1ksim";
 	#address-cells = <1>;
@@ -22,15 +21,15 @@ memory@0 {
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
-		cpu@0 {
+		cpu0: cpu@0 {
 			compatible = "opencores,or1200-rtlsvn481";
 			reg = <0>;
-			clock-frequency = <20000000>;
+			clock-frequency = <0>;
 		};
-		cpu@1 {
+		cpu1: cpu@1 {
 			compatible = "opencores,or1200-rtlsvn481";
 			reg = <1>;
-			clock-frequency = <20000000>;
+			clock-frequency = <0>;
 		};
 	};
 
@@ -57,7 +56,7 @@ serial0: serial@90000000 {
 		compatible = "opencores,uart16550-rtlsvn105", "ns16550a";
 		reg = <0x90000000 0x100>;
 		interrupts = <2>;
-		clock-frequency = <20000000>;
+		clock-frequency = <0>;
 	};
 
 	enet0: ethoc@92000000 {
@@ -65,5 +64,6 @@ enet0: ethoc@92000000 {
 		reg = <0x92000000 0x800>;
 		interrupts = <4>;
 		big-endian;
+		status = "disabled";
 	};
 };
diff --git a/arch/openrisc/configs/simple_smp_defconfig b/arch/openrisc/configs/simple_smp_defconfig
index 6008e824d31c..db77c795225e 100644
--- a/arch/openrisc/configs/simple_smp_defconfig
+++ b/arch/openrisc/configs/simple_smp_defconfig
@@ -20,7 +20,7 @@ CONFIG_SLUB=y
 CONFIG_SLUB_TINY=y
 CONFIG_MODULES=y
 # CONFIG_BLOCK is not set
-CONFIG_BUILTIN_DTB_NAME="simple_smp"
+CONFIG_BUILTIN_DTB_NAME="simple-smp"
 CONFIG_SMP=y
 CONFIG_HZ_100=y
 CONFIG_OPENRISC_HAVE_SHADOW_GPRS=y
-- 
2.51.0
Re: [PATCH 4/5] openrisc: dts: Split simple smp dts to dts and dtsi
Posted by Conor Dooley 14 hours ago 
On Sun, Dec 14, 2025 at 06:01:44PM +0000, Stafford Horne wrote:
> Split out the common memory, CPU and PIC definitions of the simple SMP
> system to a DTSI file which we will later use for our De0 Nano multicore
> board device tree.  We also take this opportunity to swich underscores
> to dashes as that seems to be the more common convention for DTS files.
> 
> Signed-off-by: Stafford Horne <shorne@gmail.com>
> ---
>  arch/openrisc/boot/dts/simple-smp.dts         | 25 +++++++++++++++++++
>  .../dts/{simple_smp.dts => simple-smp.dtsi}   | 12 ++++-----
>  arch/openrisc/configs/simple_smp_defconfig    |  2 +-
>  3 files changed, 32 insertions(+), 7 deletions(-)
>  create mode 100644 arch/openrisc/boot/dts/simple-smp.dts
>  rename arch/openrisc/boot/dts/{simple_smp.dts => simple-smp.dtsi} (89%)
> 
> diff --git a/arch/openrisc/boot/dts/simple-smp.dts b/arch/openrisc/boot/dts/simple-smp.dts
> new file mode 100644
> index 000000000000..174c2613c419
> --- /dev/null
> +++ b/arch/openrisc/boot/dts/simple-smp.dts
> @@ -0,0 +1,25 @@
> +// SPDX-License-Identifier: GPL-2.0
> +
> +/dts-v1/;
> +
> +#include "simple_smp.dtsi"
> +
> +/ {
> +	model = "Simple SMP Board";
> +};
> +
> +&cpu0 {
> +	clock-frequency = <20000000>;
> +};
> +
> +&cpu1 {
> +	clock-frequency = <20000000>;
> +};
> +
> +&serial0 {
> +	clock-frequency = <20000000>;
> +};
> +
> +&enet0 {
> +	status = "okay";
> +};
> diff --git a/arch/openrisc/boot/dts/simple_smp.dts b/arch/openrisc/boot/dts/simple-smp.dtsi
> similarity index 89%
> rename from arch/openrisc/boot/dts/simple_smp.dts
> rename to arch/openrisc/boot/dts/simple-smp.dtsi
> index 71af0e117bfe..92770bb6fcf7 100644
> --- a/arch/openrisc/boot/dts/simple_smp.dts
> +++ b/arch/openrisc/boot/dts/simple-smp.dtsi
> @@ -1,4 +1,3 @@
> -/dts-v1/;
>  / {
>  	compatible = "opencores,or1ksim";
>  	#address-cells = <1>;
> @@ -22,15 +21,15 @@ memory@0 {
>  	cpus {
>  		#address-cells = <1>;
>  		#size-cells = <0>;
> -		cpu@0 {
> +		cpu0: cpu@0 {
>  			compatible = "opencores,or1200-rtlsvn481";
>  			reg = <0>;
> -			clock-frequency = <20000000>;
> +			clock-frequency = <0>;

Delete these lines, don't set them to zero please.

>  		};
> -		cpu@1 {
> +		cpu1: cpu@1 {
>  			compatible = "opencores,or1200-rtlsvn481";
>  			reg = <1>;
> -			clock-frequency = <20000000>;
> +			clock-frequency = <0>;
>  		};
>  	};
>  
> @@ -57,7 +56,7 @@ serial0: serial@90000000 {
>  		compatible = "opencores,uart16550-rtlsvn105", "ns16550a";
>  		reg = <0x90000000 0x100>;
>  		interrupts = <2>;
> -		clock-frequency = <20000000>;
> +		clock-frequency = <0>;
>  	};
>  
>  	enet0: ethoc@92000000 {
> @@ -65,5 +64,6 @@ enet0: ethoc@92000000 {
>  		reg = <0x92000000 0x800>;
>  		interrupts = <4>;
>  		big-endian;
> +		status = "disabled";
>  	};
>  };
> diff --git a/arch/openrisc/configs/simple_smp_defconfig b/arch/openrisc/configs/simple_smp_defconfig
> index 6008e824d31c..db77c795225e 100644
> --- a/arch/openrisc/configs/simple_smp_defconfig
> +++ b/arch/openrisc/configs/simple_smp_defconfig
> @@ -20,7 +20,7 @@ CONFIG_SLUB=y
>  CONFIG_SLUB_TINY=y
>  CONFIG_MODULES=y
>  # CONFIG_BLOCK is not set
> -CONFIG_BUILTIN_DTB_NAME="simple_smp"
> +CONFIG_BUILTIN_DTB_NAME="simple-smp"
>  CONFIG_SMP=y
>  CONFIG_HZ_100=y
>  CONFIG_OPENRISC_HAVE_SHADOW_GPRS=y
> -- 
> 2.51.0
>
Re: [PATCH 4/5] openrisc: dts: Split simple smp dts to dts and dtsi
Posted by Stafford Horne 13 hours ago 
On Mon, Dec 15, 2025 at 04:58:41PM +0000, Conor Dooley wrote:
> On Sun, Dec 14, 2025 at 06:01:44PM +0000, Stafford Horne wrote:
> > Split out the common memory, CPU and PIC definitions of the simple SMP
> > system to a DTSI file which we will later use for our De0 Nano multicore
> > board device tree.  We also take this opportunity to swich underscores
> > to dashes as that seems to be the more common convention for DTS files.
> > 
> > Signed-off-by: Stafford Horne <shorne@gmail.com>
> > ---
> >  arch/openrisc/boot/dts/simple-smp.dts         | 25 +++++++++++++++++++
> >  .../dts/{simple_smp.dts => simple-smp.dtsi}   | 12 ++++-----
> >  arch/openrisc/configs/simple_smp_defconfig    |  2 +-
> >  3 files changed, 32 insertions(+), 7 deletions(-)
> >  create mode 100644 arch/openrisc/boot/dts/simple-smp.dts
> >  rename arch/openrisc/boot/dts/{simple_smp.dts => simple-smp.dtsi} (89%)
> > 
> > diff --git a/arch/openrisc/boot/dts/simple-smp.dts b/arch/openrisc/boot/dts/simple-smp.dts
> > new file mode 100644
> > index 000000000000..174c2613c419
> > --- /dev/null
> > +++ b/arch/openrisc/boot/dts/simple-smp.dts
> > @@ -0,0 +1,25 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +
> > +/dts-v1/;
> > +
> > +#include "simple_smp.dtsi"
> > +
> > +/ {
> > +	model = "Simple SMP Board";
> > +};
> > +
> > +&cpu0 {
> > +	clock-frequency = <20000000>;
> > +};
> > +
> > +&cpu1 {
> > +	clock-frequency = <20000000>;
> > +};
> > +
> > +&serial0 {
> > +	clock-frequency = <20000000>;
> > +};
> > +
> > +&enet0 {
> > +	status = "okay";
> > +};
> > diff --git a/arch/openrisc/boot/dts/simple_smp.dts b/arch/openrisc/boot/dts/simple-smp.dtsi
> > similarity index 89%
> > rename from arch/openrisc/boot/dts/simple_smp.dts
> > rename to arch/openrisc/boot/dts/simple-smp.dtsi
> > index 71af0e117bfe..92770bb6fcf7 100644
> > --- a/arch/openrisc/boot/dts/simple_smp.dts
> > +++ b/arch/openrisc/boot/dts/simple-smp.dtsi
> > @@ -1,4 +1,3 @@
> > -/dts-v1/;
> >  / {
> >  	compatible = "opencores,or1ksim";
> >  	#address-cells = <1>;
> > @@ -22,15 +21,15 @@ memory@0 {
> >  	cpus {
> >  		#address-cells = <1>;
> >  		#size-cells = <0>;
> > -		cpu@0 {
> > +		cpu0: cpu@0 {
> >  			compatible = "opencores,or1200-rtlsvn481";
> >  			reg = <0>;
> > -			clock-frequency = <20000000>;
> > +			clock-frequency = <0>;
> 
> Delete these lines, don't set them to zero please.

OK, I wasn't sure what to put here so put 0, Just removing is much better.

-Stafford

> >  		};
> > -		cpu@1 {
> > +		cpu1: cpu@1 {
> >  			compatible = "opencores,or1200-rtlsvn481";
> >  			reg = <1>;
> > -			clock-frequency = <20000000>;
> > +			clock-frequency = <0>;
> >  		};
> >  	};
> >  
> > @@ -57,7 +56,7 @@ serial0: serial@90000000 {
> >  		compatible = "opencores,uart16550-rtlsvn105", "ns16550a";
> >  		reg = <0x90000000 0x100>;
> >  		interrupts = <2>;
> > -		clock-frequency = <20000000>;
> > +		clock-frequency = <0>;
> >  	};
> >  
> >  	enet0: ethoc@92000000 {
> > @@ -65,5 +64,6 @@ enet0: ethoc@92000000 {
> >  		reg = <0x92000000 0x800>;
> >  		interrupts = <4>;
> >  		big-endian;
> > +		status = "disabled";
> >  	};
> >  };
> > diff --git a/arch/openrisc/configs/simple_smp_defconfig b/arch/openrisc/configs/simple_smp_defconfig
> > index 6008e824d31c..db77c795225e 100644
> > --- a/arch/openrisc/configs/simple_smp_defconfig
> > +++ b/arch/openrisc/configs/simple_smp_defconfig
> > @@ -20,7 +20,7 @@ CONFIG_SLUB=y
> >  CONFIG_SLUB_TINY=y
> >  CONFIG_MODULES=y
> >  # CONFIG_BLOCK is not set
> > -CONFIG_BUILTIN_DTB_NAME="simple_smp"
> > +CONFIG_BUILTIN_DTB_NAME="simple-smp"
> >  CONFIG_SMP=y
> >  CONFIG_HZ_100=y
> >  CONFIG_OPENRISC_HAVE_SHADOW_GPRS=y
> > -- 
> > 2.51.0
> >
Re: [PATCH 4/5] openrisc: dts: Split simple smp dts to dts and dtsi
Posted by Stafford Horne 1 day ago 
On Sun, Dec 14, 2025 at 06:01:44PM +0000, Stafford Horne wrote:
> Split out the common memory, CPU and PIC definitions of the simple SMP
> system to a DTSI file which we will later use for our De0 Nano multicore
> board device tree.  We also take this opportunity to swich underscores
> to dashes as that seems to be the more common convention for DTS files.
> 
> Signed-off-by: Stafford Horne <shorne@gmail.com>
> ---
>  arch/openrisc/boot/dts/simple-smp.dts         | 25 +++++++++++++++++++
>  .../dts/{simple_smp.dts => simple-smp.dtsi}   | 12 ++++-----
>  arch/openrisc/configs/simple_smp_defconfig    |  2 +-
>  3 files changed, 32 insertions(+), 7 deletions(-)
>  create mode 100644 arch/openrisc/boot/dts/simple-smp.dts
>  rename arch/openrisc/boot/dts/{simple_smp.dts => simple-smp.dtsi} (89%)
> 
> diff --git a/arch/openrisc/boot/dts/simple-smp.dts b/arch/openrisc/boot/dts/simple-smp.dts
> new file mode 100644
> index 000000000000..174c2613c419
> --- /dev/null
> +++ b/arch/openrisc/boot/dts/simple-smp.dts
> @@ -0,0 +1,25 @@
> +// SPDX-License-Identifier: GPL-2.0
> +
> +/dts-v1/;
> +
> +#include "simple_smp.dtsi"

This should be simple-smp.dtsi.

> +
> +/ {
> +	model = "Simple SMP Board";
> +};
> +
> +&cpu0 {
> +	clock-frequency = <20000000>;
> +};
> +
> +&cpu1 {
> +	clock-frequency = <20000000>;
> +};
> +
> +&serial0 {
> +	clock-frequency = <20000000>;
> +};
> +
> +&enet0 {
> +	status = "okay";
> +};
> diff --git a/arch/openrisc/boot/dts/simple_smp.dts b/arch/openrisc/boot/dts/simple-smp.dtsi
> similarity index 89%
> rename from arch/openrisc/boot/dts/simple_smp.dts
> rename to arch/openrisc/boot/dts/simple-smp.dtsi
> index 71af0e117bfe..92770bb6fcf7 100644
> --- a/arch/openrisc/boot/dts/simple_smp.dts
> +++ b/arch/openrisc/boot/dts/simple-smp.dtsi
> @@ -1,4 +1,3 @@
> -/dts-v1/;
>  / {
>  	compatible = "opencores,or1ksim";
>  	#address-cells = <1>;
> @@ -22,15 +21,15 @@ memory@0 {
>  	cpus {
>  		#address-cells = <1>;
>  		#size-cells = <0>;
> -		cpu@0 {
> +		cpu0: cpu@0 {
>  			compatible = "opencores,or1200-rtlsvn481";
>  			reg = <0>;
> -			clock-frequency = <20000000>;
> +			clock-frequency = <0>;
>  		};
> -		cpu@1 {
> +		cpu1: cpu@1 {
>  			compatible = "opencores,or1200-rtlsvn481";
>  			reg = <1>;
> -			clock-frequency = <20000000>;
> +			clock-frequency = <0>;
>  		};
>  	};
>  
> @@ -57,7 +56,7 @@ serial0: serial@90000000 {
>  		compatible = "opencores,uart16550-rtlsvn105", "ns16550a";
>  		reg = <0x90000000 0x100>;
>  		interrupts = <2>;
> -		clock-frequency = <20000000>;
> +		clock-frequency = <0>;
>  	};
>  
>  	enet0: ethoc@92000000 {
> @@ -65,5 +64,6 @@ enet0: ethoc@92000000 {
>  		reg = <0x92000000 0x800>;
>  		interrupts = <4>;
>  		big-endian;
> +		status = "disabled";
>  	};
>  };
> diff --git a/arch/openrisc/configs/simple_smp_defconfig b/arch/openrisc/configs/simple_smp_defconfig
> index 6008e824d31c..db77c795225e 100644
> --- a/arch/openrisc/configs/simple_smp_defconfig
> +++ b/arch/openrisc/configs/simple_smp_defconfig
> @@ -20,7 +20,7 @@ CONFIG_SLUB=y
>  CONFIG_SLUB_TINY=y
>  CONFIG_MODULES=y
>  # CONFIG_BLOCK is not set
> -CONFIG_BUILTIN_DTB_NAME="simple_smp"
> +CONFIG_BUILTIN_DTB_NAME="simple-smp"
>  CONFIG_SMP=y
>  CONFIG_HZ_100=y
>  CONFIG_OPENRISC_HAVE_SHADOW_GPRS=y
> -- 
> 2.51.0
>

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