The watchdog support in EL1 is SBSA compliant, handled by Gunyah
hypervisor, but in EL2. the watchdog is an instance of the APSS WDT HW
block, same as older platforms. So describe the APSS WDT node in the EL2
overlay.
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/x1-el2.dtso | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/x1-el2.dtso b/arch/arm64/boot/dts/qcom/x1-el2.dtso
index 2d1c9151cf1b..404174a15659 100644
--- a/arch/arm64/boot/dts/qcom/x1-el2.dtso
+++ b/arch/arm64/boot/dts/qcom/x1-el2.dtso
@@ -7,6 +7,8 @@
/dts-v1/;
/plugin/;
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
/* We can't and don't need to use zap shader in EL2 as linux can zap the gpu on it's own. */
&gpu_zap_shader {
status = "disabled";
@@ -55,3 +57,17 @@ &pcie_smmu {
&sbsa_watchdog {
status = "disabled";
};
+
+&soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ /* The APSS watchdog is only accessible in EL2 */
+ watchdog@17410000 {
+ compatible = "qcom,apss-wdt-x1e80100", "qcom,kpss-wdt";
+ reg = <0x0 0x17410000 0x0 0x1000>;
+ clocks = <&sleep_clk>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_EDGE_RISING>;
+ interrupt-parent = <&intc>;
+ };
+};
--
2.48.1
On Sun, Dec 14, 2025 at 10:49:59PM +0200, Abel Vesa wrote:
> The watchdog support in EL1 is SBSA compliant, handled by Gunyah
> hypervisor, but in EL2. the watchdog is an instance of the APSS WDT HW
> block, same as older platforms. So describe the APSS WDT node in the EL2
> overlay.
>
> Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/x1-el2.dtso | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/x1-el2.dtso b/arch/arm64/boot/dts/qcom/x1-el2.dtso
> index 2d1c9151cf1b..404174a15659 100644
> --- a/arch/arm64/boot/dts/qcom/x1-el2.dtso
> +++ b/arch/arm64/boot/dts/qcom/x1-el2.dtso
> @@ -7,6 +7,8 @@
> /dts-v1/;
> /plugin/;
>
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> /* We can't and don't need to use zap shader in EL2 as linux can zap the gpu on it's own. */
> &gpu_zap_shader {
> status = "disabled";
> @@ -55,3 +57,17 @@ &pcie_smmu {
> &sbsa_watchdog {
> status = "disabled";
> };
> +
> +&soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + /* The APSS watchdog is only accessible in EL2 */
> + watchdog@17410000 {
> + compatible = "qcom,apss-wdt-x1e80100", "qcom,kpss-wdt";
> + reg = <0x0 0x17410000 0x0 0x1000>;
> + clocks = <&sleep_clk>;
> + interrupts = <GIC_SPI 0 IRQ_TYPE_EDGE_RISING>;
> + interrupt-parent = <&intc>;
> + };
For consistency with &pcie_smmu, I think it would be cleaner to put this
into hamoa.dtsi, mark it as status = "reserved"; and then enable it here
in the overlay. That way, we have a full hardware description in
hamoa.dtsi.
You should also be able to drop the interrupt-parent if you move it
there.
Thanks,
Stephan
On 25-12-18 11:06:08, Stephan Gerhold wrote:
> On Sun, Dec 14, 2025 at 10:49:59PM +0200, Abel Vesa wrote:
> > The watchdog support in EL1 is SBSA compliant, handled by Gunyah
> > hypervisor, but in EL2. the watchdog is an instance of the APSS WDT HW
> > block, same as older platforms. So describe the APSS WDT node in the EL2
> > overlay.
> >
> > Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
> > ---
> > arch/arm64/boot/dts/qcom/x1-el2.dtso | 16 ++++++++++++++++
> > 1 file changed, 16 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/x1-el2.dtso b/arch/arm64/boot/dts/qcom/x1-el2.dtso
> > index 2d1c9151cf1b..404174a15659 100644
> > --- a/arch/arm64/boot/dts/qcom/x1-el2.dtso
> > +++ b/arch/arm64/boot/dts/qcom/x1-el2.dtso
> > @@ -7,6 +7,8 @@
> > /dts-v1/;
> > /plugin/;
> >
> > +#include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > /* We can't and don't need to use zap shader in EL2 as linux can zap the gpu on it's own. */
> > &gpu_zap_shader {
> > status = "disabled";
> > @@ -55,3 +57,17 @@ &pcie_smmu {
> > &sbsa_watchdog {
> > status = "disabled";
> > };
> > +
> > +&soc {
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > +
> > + /* The APSS watchdog is only accessible in EL2 */
> > + watchdog@17410000 {
> > + compatible = "qcom,apss-wdt-x1e80100", "qcom,kpss-wdt";
> > + reg = <0x0 0x17410000 0x0 0x1000>;
> > + clocks = <&sleep_clk>;
> > + interrupts = <GIC_SPI 0 IRQ_TYPE_EDGE_RISING>;
> > + interrupt-parent = <&intc>;
> > + };
>
> For consistency with &pcie_smmu, I think it would be cleaner to put this
> into hamoa.dtsi, mark it as status = "reserved"; and then enable it here
> in the overlay. That way, we have a full hardware description in
> hamoa.dtsi.
Sounds like a good idea. Will do that in v2.
>
> You should also be able to drop the interrupt-parent if you move it
> there.
Yes. It will not be needed.
Thanks for reviewing,
Abel
On Sun, Dec 14, 2025 at 10:49:59PM +0200, Abel Vesa wrote: > The watchdog support in EL1 is SBSA compliant, handled by Gunyah > hypervisor, but in EL2. the watchdog is an instance of the APSS WDT HW > block, same as older platforms. So describe the APSS WDT node in the EL2 > overlay. > > Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com> > --- > arch/arm64/boot/dts/qcom/x1-el2.dtso | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> -- With best wishes Dmitry
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