[PATCH v2] arm64: dts: qcom: sdm630: fix gpu_speed_bin size

Dmitry Baryshkov posted 1 patch 5 days, 7 hours ago
arch/arm64/boot/dts/qcom/sdm630.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
[PATCH v2] arm64: dts: qcom: sdm630: fix gpu_speed_bin size
Posted by Dmitry Baryshkov 5 days, 7 hours ago
Historically sdm630.dtsi has used 1 byte length for the gpu_speed_bin
cell, although it spans two bytes (offset 5, size 7 bits). It was being
accepted by the kernel because before the commit 7a06ef751077 ("nvmem:
core: fix bit offsets of more than one byte") the kernel didn't have
length check. After this commit nvmem core rejects QFPROM on sdm630 /
sdm660, making GPU and USB unusable on those platforms.

Set the size of the gpu_speed_bin cell to 2 bytes, fixing the parsing
error. While we are at it, update the length to 8 bits as pointed out by
Alexey Minnekhanov.

Fixes: b190fb010664 ("arm64: dts: qcom: sdm630: Add sdm630 dts file")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
Changes in v2:
- Update cell length to 8 bits (Alexey)
- Link to v1: https://lore.kernel.org/r/20251006-sdm630-fix-gpu-v1-1-44d69bdea59a@oss.qualcomm.com
---
 arch/arm64/boot/dts/qcom/sdm630.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index 8b1a45a4e56e..b383e480a394 100644
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -598,8 +598,8 @@ qusb2_hstx_trim: hstx-trim@240 {
 			};
 
 			gpu_speed_bin: gpu-speed-bin@41a0 {
-				reg = <0x41a2 0x1>;
-				bits = <5 7>;
+				reg = <0x41a2 0x2>;
+				bits = <5 8>;
 			};
 		};
 

---
base-commit: 008d3547aae5bc86fac3eda317489169c3fda112
change-id: 20251004-sdm630-fix-gpu-f9786db8049a

Best regards,
-- 
With best wishes
Dmitry
Re: [PATCH v2] arm64: dts: qcom: sdm630: fix gpu_speed_bin size
Posted by Alexey Minnekhanov 4 days, 20 hours ago
On 11.12.2025 04:27, Dmitry Baryshkov wrote:
> Historically sdm630.dtsi has used 1 byte length for the gpu_speed_bin
> cell, although it spans two bytes (offset 5, size 7 bits). It was being
> accepted by the kernel because before the commit 7a06ef751077 ("nvmem:
> core: fix bit offsets of more than one byte") the kernel didn't have
> length check. After this commit nvmem core rejects QFPROM on sdm630 /
> sdm660, making GPU and USB unusable on those platforms.
> 
> Set the size of the gpu_speed_bin cell to 2 bytes, fixing the parsing
> error. While we are at it, update the length to 8 bits as pointed out by
> Alexey Minnekhanov.
> 
> Fixes: b190fb010664 ("arm64: dts: qcom: sdm630: Add sdm630 dts file")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> ---
> Changes in v2:
> - Update cell length to 8 bits (Alexey)
> - Link to v1: https://lore.kernel.org/r/20251006-sdm630-fix-gpu-v1-1-44d69bdea59a@oss.qualcomm.com
> ---
>   arch/arm64/boot/dts/qcom/sdm630.dtsi | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
> index 8b1a45a4e56e..b383e480a394 100644
> --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
> @@ -598,8 +598,8 @@ qusb2_hstx_trim: hstx-trim@240 {
>   			};
>   
>   			gpu_speed_bin: gpu-speed-bin@41a0 {
> -				reg = <0x41a2 0x1>;
> -				bits = <5 7>;
> +				reg = <0x41a2 0x2>;
> +				bits = <5 8>;
>   			};
>   		};
>   
> 
> ---
> base-commit: 008d3547aae5bc86fac3eda317489169c3fda112
> change-id: 20251004-sdm630-fix-gpu-f9786db8049a
> 
> Best regards,

Thanks for the fix! FWIW,

Reviewed-by: Alexey Minnekhanov <alexeymin@postmarketos.org>

--
Regards,
Alexey Minnekhanov