On X Elite, there is a crypto engine IP block similar to ones found on
SM8x50 platforms.
Describe the crypto engine and its BAM.
Tested-by: Wenjia Zhang <wenjia.zhang@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Signed-off-by: Harshal Dev <harshal.dev@oss.qualcomm.com>
---
The dt-binding schema update for the x1e80100 compatible is here
(already merged):
https://lore.kernel.org/all/20250213-dt-bindings-qcom-qce-x1e80100-v1-1-d17ef73a1c12@linaro.org/
---
Changes in v6:
- Added Reviewed-by tag from Abel.
- Link to v5: https://lore.kernel.org/r/20251210-crypto_dt_node_x1e80100-v5-1-5ad22a869a56@oss.qualcomm.com
Changes in v5:
- Sorted the nodes correctly as per their unit address.
- Collected Tested-by and Reviewed-by tags.
- Link to v4: https://lore.kernel.org/r/20251208-crypto_dt_node_x1e80100-v4-1-f5d03bb2c501@oss.qualcomm.com
Changes in v4:
- Updated iommu property to use 0x0 instead of 0x0000 in last cell.
- Updated dma-names property by listing one dma channel name per line.
- Use QCOM_ICC_TAG_ALWAYS symbol instead of 0 in the interconnects property.
- Link to v3: https://lore.kernel.org/r/20251127-crypto_dt_node_x1e80100-v3-1-29722003fe83@oss.qualcomm.com
---
Changes in v3:
- Fixed num-channels and qcom,num-ees properties by updating them to 20 and 4 respectively.
- Link to v2: https://lore.kernel.org/all/20250221-x1e80100-crypto-v2-1-413ecf68dcd7@linaro.org
Changes in v2:
- Added EE and channels numbers in BAM node, like Stephan suggested.
- Added v1.7.4 compatible as well.
- Link to v1: https://lore.kernel.org/r/20250213-x1e80100-crypto-v1-1-f93afdd4025a@linaro.org
---
arch/arm64/boot/dts/qcom/x1e80100.dtsi | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
index 51576d9c935d..7066130f242d 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
@@ -3760,6 +3760,32 @@ pcie4_phy: phy@1c0e000 {
status = "disabled";
};
+ cryptobam: dma-controller@1dc4000 {
+ compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
+ reg = <0x0 0x01dc4000 0x0 0x28000>;
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ iommus = <&apps_smmu 0x480 0x0>,
+ <&apps_smmu 0x481 0x0>;
+ qcom,ee = <0>;
+ qcom,controlled-remotely;
+ num-channels = <20>;
+ qcom,num-ees = <4>;
+ };
+
+ crypto: crypto@1dfa000 {
+ compatible = "qcom,x1e80100-qce", "qcom,sm8150-qce", "qcom,qce";
+ reg = <0x0 0x01dfa000 0x0 0x6000>;
+ dmas = <&cryptobam 4>, <&cryptobam 5>;
+ dma-names = "rx",
+ "tx";
+ iommus = <&apps_smmu 0x480 0x0>,
+ <&apps_smmu 0x481 0x0>;
+ interconnects = <&aggre2_noc MASTER_CRYPTO QCOM_ICC_TAG_ALWAYS
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
+ interconnect-names = "memory";
+ };
+
tcsr_mutex: hwlock@1f40000 {
compatible = "qcom,tcsr-mutex";
reg = <0 0x01f40000 0 0x20000>;
---
base-commit: 765e56e41a5af2d456ddda6cbd617b9d3295ab4e
change-id: 20251127-crypto_dt_node_x1e80100-bcb1a2837b56
Best regards,
--
Harshal Dev <harshal.dev@oss.qualcomm.com>
On Thu, 11 Dec 2025 14:19:45 +0530, Harshal Dev wrote:
> On X Elite, there is a crypto engine IP block similar to ones found on
> SM8x50 platforms.
>
> Describe the crypto engine and its BAM.
>
>
Applied, thanks!
[1/1] arm64: dts: qcom: x1e80100: Add crypto engine
commit: 7d1974ce80fc386834e5667b0f579c2c766c4faa
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
On 11/12/2025 09:49, Harshal Dev wrote: > On X Elite, there is a crypto engine IP block similar to ones found on > SM8x50 platforms. > > Describe the crypto engine and its BAM. > > Tested-by: Wenjia Zhang <wenjia.zhang@oss.qualcomm.com> > Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> > Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> > Signed-off-by: Harshal Dev <harshal.dev@oss.qualcomm.com> > --- > The dt-binding schema update for the x1e80100 compatible is here > (already merged): > > https://lore.kernel.org/all/20250213-dt-bindings-qcom-qce-x1e80100-v1-1-d17ef73a1c12@linaro.org/ > --- > Changes in v6: > - Added Reviewed-by tag from Abel. > - Link to v5: https://lore.kernel.org/r/20251210-crypto_dt_node_x1e80100-v5-1-5ad22a869a56@oss.qualcomm.com You just sent it 7 days ago! Why new version? Please relax, and help out by reviewing other patches on the mailing lists in order to relieve the burden of maintainers and move your patches higher up the list. Best regards, Krzysztof
On 17/12/2025 14:53, Krzysztof Kozlowski wrote: > On 11/12/2025 09:49, Harshal Dev wrote: >> On X Elite, there is a crypto engine IP block similar to ones found on >> SM8x50 platforms. >> >> Describe the crypto engine and its BAM. >> >> Tested-by: Wenjia Zhang <wenjia.zhang@oss.qualcomm.com> >> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> >> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> >> Signed-off-by: Harshal Dev <harshal.dev@oss.qualcomm.com> >> --- >> The dt-binding schema update for the x1e80100 compatible is here >> (already merged): >> >> https://lore.kernel.org/all/20250213-dt-bindings-qcom-qce-x1e80100-v1-1-d17ef73a1c12@linaro.org/ >> --- >> Changes in v6: >> - Added Reviewed-by tag from Abel. >> - Link to v5: https://lore.kernel.org/r/20251210-crypto_dt_node_x1e80100-v5-1-5ad22a869a56@oss.qualcomm.com > > You just sent it 7 days ago! Why new version? Please relax, and help out s/7/1 day ago/ > by reviewing other patches on the mailing lists in order to relieve the > burden of maintainers and move your patches higher up the list. > > > Best regards, > Krzysztof Best regards, Krzysztof
On 12/17/2025 7:23 PM, Krzysztof Kozlowski wrote: > On 17/12/2025 14:53, Krzysztof Kozlowski wrote: >> On 11/12/2025 09:49, Harshal Dev wrote: >>> On X Elite, there is a crypto engine IP block similar to ones found on >>> SM8x50 platforms. >>> >>> Describe the crypto engine and its BAM. >>> >>> Tested-by: Wenjia Zhang <wenjia.zhang@oss.qualcomm.com> >>> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> >>> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> >>> Signed-off-by: Harshal Dev <harshal.dev@oss.qualcomm.com> >>> --- >>> The dt-binding schema update for the x1e80100 compatible is here >>> (already merged): >>> >>> https://lore.kernel.org/all/20250213-dt-bindings-qcom-qce-x1e80100-v1-1-d17ef73a1c12@linaro.org/ >>> --- >>> Changes in v6: >>> - Added Reviewed-by tag from Abel. >>> - Link to v5: https://lore.kernel.org/r/20251210-crypto_dt_node_x1e80100-v5-1-5ad22a869a56@oss.qualcomm.com >> >> You just sent it 7 days ago! Why new version? Please relax, and help out > > s/7/1 day ago/ > >> by reviewing other patches on the mailing lists in order to relieve the >> burden of maintainers and move your patches higher up the list. >> Apologies for this Krzysztof, I will take Konrad's advice here to not unnecessary collect tags and resend the patch. Will also try to look into some reviews and see where I can be of help. :) Thanks, Harshal >> >> Best regards, >> Krzysztof > > > Best regards, > Krzysztof
On 12/11/25 9:49 AM, Harshal Dev wrote: > On X Elite, there is a crypto engine IP block similar to ones found on > SM8x50 platforms. > > Describe the crypto engine and its BAM. > > Tested-by: Wenjia Zhang <wenjia.zhang@oss.qualcomm.com> > Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> > Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> > Signed-off-by: Harshal Dev <harshal.dev@oss.qualcomm.com> > --- > The dt-binding schema update for the x1e80100 compatible is here > (already merged): > > https://lore.kernel.org/all/20250213-dt-bindings-qcom-qce-x1e80100-v1-1-d17ef73a1c12@linaro.org/ > --- > Changes in v6: > - Added Reviewed-by tag from Abel. > - Link to v5: https://lore.kernel.org/r/20251210-crypto_dt_node_x1e80100-v5-1-5ad22a869a56@oss.qualcomm.com Please don't resend just to collect tags, the maintainer tooling takes care of this already Konrad
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