drivers/gpu/drm/i915/gem/i915_gem_object_types.h | 1 + 1 file changed, 1 insertion(+)
I915_BO_ALLOC_NOTHP must be added to the I915_BO_ALLOC_FLAGS mask in
order to pass GEM_BUG_ON() valid flags checks.
Reported-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Closes: https://lore.kernel.org/intel-gfx/d73adfa8-d61b-46b3-9385-dde53d8db8ad@intel.com/
Fixes: a8a9a590221c ("drm/i915: Use huge tmpfs mountpoint helpers")
Suggested-by: Tvrtko Ursulin <tursulin@ursulin.net>
Signed-off-by: Loïc Molinari <loic.molinari@collabora.com>
---
drivers/gpu/drm/i915/gem/i915_gem_object_types.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
index f94409e8ec4c..35d4c7d0c579 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
@@ -363,6 +363,7 @@ struct drm_i915_gem_object {
I915_BO_ALLOC_PM_EARLY | \
I915_BO_ALLOC_GPU_ONLY | \
I915_BO_ALLOC_CCS_AUX | \
+ I915_BO_ALLOC_NOTHP | \
I915_BO_PREALLOC)
#define I915_BO_READONLY BIT(10)
#define I915_TILING_QUIRK_BIT 11 /* unknown swizzling; do not release! */
--
2.47.3
On 10/12/2025 12:09, Loïc Molinari wrote:
> I915_BO_ALLOC_NOTHP must be added to the I915_BO_ALLOC_FLAGS mask in
> order to pass GEM_BUG_ON() valid flags checks.
>
> Reported-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> Closes: https://lore.kernel.org/intel-gfx/d73adfa8-d61b-46b3-9385-dde53d8db8ad@intel.com/
> Fixes: a8a9a590221c ("drm/i915: Use huge tmpfs mountpoint helpers")
> Suggested-by: Tvrtko Ursulin <tursulin@ursulin.net>
> Signed-off-by: Loïc Molinari <loic.molinari@collabora.com>
> ---
> drivers/gpu/drm/i915/gem/i915_gem_object_types.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> index f94409e8ec4c..35d4c7d0c579 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> @@ -363,6 +363,7 @@ struct drm_i915_gem_object {
> I915_BO_ALLOC_PM_EARLY | \
> I915_BO_ALLOC_GPU_ONLY | \
> I915_BO_ALLOC_CCS_AUX | \
> + I915_BO_ALLOC_NOTHP | \
> I915_BO_PREALLOC)
> #define I915_BO_READONLY BIT(10)
> #define I915_TILING_QUIRK_BIT 11 /* unknown swizzling; do not release! */
Acked-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
It is passing BAT so I think it is fine to go ahead and merge it. Of
course via the same branch where the breakage is ie. drm-misc.
Regards,
Tvrtko
On Wed, 10 Dec 2025 15:08:02 +0100
Tvrtko Ursulin <tursulin@ursulin.net> wrote:
> On 10/12/2025 12:09, Loïc Molinari wrote:
> > I915_BO_ALLOC_NOTHP must be added to the I915_BO_ALLOC_FLAGS mask in
> > order to pass GEM_BUG_ON() valid flags checks.
> >
> > Reported-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> > Closes: https://lore.kernel.org/intel-gfx/d73adfa8-d61b-46b3-9385-dde53d8db8ad@intel.com/
> > Fixes: a8a9a590221c ("drm/i915: Use huge tmpfs mountpoint helpers")
> > Suggested-by: Tvrtko Ursulin <tursulin@ursulin.net>
> > Signed-off-by: Loïc Molinari <loic.molinari@collabora.com>
> > ---
> > drivers/gpu/drm/i915/gem/i915_gem_object_types.h | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> > index f94409e8ec4c..35d4c7d0c579 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> > @@ -363,6 +363,7 @@ struct drm_i915_gem_object {
> > I915_BO_ALLOC_PM_EARLY | \
> > I915_BO_ALLOC_GPU_ONLY | \
> > I915_BO_ALLOC_CCS_AUX | \
> > + I915_BO_ALLOC_NOTHP | \
> > I915_BO_PREALLOC)
> > #define I915_BO_READONLY BIT(10)
> > #define I915_TILING_QUIRK_BIT 11 /* unknown swizzling; do not release! */
>
> Acked-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
>
> It is passing BAT so I think it is fine to go ahead and merge it. Of
> course via the same branch where the breakage is ie. drm-misc.
Pushed to drm-misc-next.
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