A612 GPU has a new IP called RGMU (Reduced Graphics Management Unit)
which replaces GMU. But it doesn't do clock or voltage scaling. So we
need the gpu core clock in the GPU node along with the power domain to
do clock and voltage scaling from the kernel. Update the bindings to
describe this GPU.
Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
---
.../devicetree/bindings/display/msm/gpu.yaml | 30 ++++++++++++++++++++--
1 file changed, 28 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml
index 5c12b5aacf8f3ff64ca2ef97fb0dd6c3a26a71bc..5d5ff4307ee7ce5464afc5233f03a8bd1daaab22 100644
--- a/Documentation/devicetree/bindings/display/msm/gpu.yaml
+++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml
@@ -45,11 +45,11 @@ properties:
- const: amd,imageon
clocks:
- minItems: 2
+ minItems: 1
maxItems: 7
clock-names:
- minItems: 2
+ minItems: 1
maxItems: 7
reg:
@@ -388,6 +388,32 @@ allOf:
- clocks
- clock-names
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: qcom,adreno-612.0
+ then:
+ properties:
+ clocks:
+ items:
+ - description: GPU Core clock
+
+ clock-names:
+ items:
+ - const: core
+
+ reg-names:
+ minItems: 1
+ items:
+ - const: kgsl_3d0_reg_memory
+ - const: cx_mem
+ - const: cx_dbgc
+
+ required:
+ - clocks
+ - clock-names
+
- if:
properties:
compatible:
--
2.51.0On 04/12/2025 14:21, Akhil P Oommen wrote: > > clocks: > - minItems: 2 > + minItems: 1 > maxItems: 7 > > clock-names: > - minItems: 2 > + minItems: 1 > maxItems: 7 > > reg: > @@ -388,6 +388,32 @@ allOf: > - clocks > - clock-names > > + - if: > + properties: > + compatible: > + contains: > + const: qcom,adreno-612.0 > + then: > + properties: > + clocks: > + items: > + - description: GPU Core clock > + > + clock-names: > + items: > + - const: core > + > + reg-names: > + minItems: 1 > + items: > + - const: kgsl_3d0_reg_memory > + - const: cx_mem > + - const: cx_dbgc The patch overall gets better, thanks, but I think I asked about this already - why you don't have the list strict? I don't see reason for making list flexible and I don't see the explanation in the commit msg. Either this should be fixed-size (so minItems: 3 and same for reg:) or you should document reasons WHY in the commit msg. Otherwise next time I will ask the same. :( Best regards, Krzysztof
On 12/4/2025 9:04 PM, Krzysztof Kozlowski wrote:
> On 04/12/2025 14:21, Akhil P Oommen wrote:
>>
>> clocks:
>> - minItems: 2
>> + minItems: 1
>> maxItems: 7
>>
>> clock-names:
>> - minItems: 2
>> + minItems: 1
>> maxItems: 7
>>
>> reg:
>> @@ -388,6 +388,32 @@ allOf:
>> - clocks
>> - clock-names
>>
>> + - if:
>> + properties:
>> + compatible:
>> + contains:
>> + const: qcom,adreno-612.0
>> + then:
>> + properties:
>> + clocks:
>> + items:
>> + - description: GPU Core clock
>> +
>> + clock-names:
>> + items:
>> + - const: core
>> +
>> + reg-names:
>> + minItems: 1
>> + items:
>> + - const: kgsl_3d0_reg_memory
>> + - const: cx_mem
>> + - const: cx_dbgc
>
> The patch overall gets better, thanks, but I think I asked about this
> already - why you don't have the list strict? I don't see reason for
> making list flexible and I don't see the explanation in the commit msg.
> Either this should be fixed-size (so minItems: 3 and same for reg:) or
> you should document reasons WHY in the commit msg. Otherwise next time I
> will ask the same. :(
TBH, I was just following the convention I saw for the other entries
here. We can make it more strict. But I am curious, in which case are
num reg ranges flexible usually?
Just to confirm, we should add this here for adreno-612.0:
reg:
minItems: 3
maxItems: 3
reg-names:
minItems: 3
items:
- const: kgsl_3d0_reg_memory
- const: cx_mem
- const: cx_dbgc
-Akhil>
>
> Best regards,
> Krzysztof
On Fri, Dec 05, 2025 at 07:28:52PM +0530, Akhil P Oommen wrote: > On 12/4/2025 9:04 PM, Krzysztof Kozlowski wrote: > > On 04/12/2025 14:21, Akhil P Oommen wrote: > >> > >> clocks: > >> - minItems: 2 > >> + minItems: 1 > >> maxItems: 7 > >> > >> clock-names: > >> - minItems: 2 > >> + minItems: 1 > >> maxItems: 7 > >> > >> reg: > >> @@ -388,6 +388,32 @@ allOf: > >> - clocks > >> - clock-names > >> > >> + - if: > >> + properties: > >> + compatible: > >> + contains: > >> + const: qcom,adreno-612.0 > >> + then: > >> + properties: > >> + clocks: > >> + items: > >> + - description: GPU Core clock > >> + > >> + clock-names: > >> + items: > >> + - const: core > >> + > >> + reg-names: > >> + minItems: 1 > >> + items: > >> + - const: kgsl_3d0_reg_memory > >> + - const: cx_mem > >> + - const: cx_dbgc > > > > The patch overall gets better, thanks, but I think I asked about this > > already - why you don't have the list strict? I don't see reason for > > making list flexible and I don't see the explanation in the commit msg. > > Either this should be fixed-size (so minItems: 3 and same for reg:) or > > you should document reasons WHY in the commit msg. Otherwise next time I > > will ask the same. :( > > TBH, I was just following the convention I saw for the other entries > here. We can make it more strict. But I am curious, in which case are > num reg ranges flexible usually? This might be a historical leftover. Feel free to send a patch dropping min/maxItems for existing devices, if they never were flexible. > > Just to confirm, we should add this here for adreno-612.0: > > reg: > minItems: 3 > maxItems: 3 > > reg-names: > minItems: 3 I think you can skip minItems completely. > items: > - const: kgsl_3d0_reg_memory > - const: cx_mem > - const: cx_dbgc > > -Akhil> > > > > Best regards, > > Krzysztof > -- With best wishes Dmitry
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