[PATCH v1] ASoC: amd: acp: Audio is not resuming after s0ix

Raghavendra Prasad Mallela posted 1 patch 2 weeks, 3 days ago
There is a newer version of this series
sound/soc/amd/acp/acp-legacy-common.c | 32 +++++++++++++++++++++------
1 file changed, 25 insertions(+), 7 deletions(-)
[PATCH v1] ASoC: amd: acp: Audio is not resuming after s0ix
Posted by Raghavendra Prasad Mallela 2 weeks, 3 days ago
From: Hemalatha Pinnamreddy <hemalatha.pinnamreddy2@amd.com>

Audio fails to resume after system exits suspend mode
due to accessing incorrect ring buffer address during
resume. This patch resolves issue by selecting correct
address based on the ACP version.

Signed-off-by: Hemalatha Pinnamreddy <hemalatha.pinnamreddy2@amd.com>
Signed-off-by: Raghavendra Prasad Mallela <raghavendraprasad.mallela@amd.com>
---
 sound/soc/amd/acp/acp-legacy-common.c | 32 +++++++++++++++++++++------
 1 file changed, 25 insertions(+), 7 deletions(-)

diff --git a/sound/soc/amd/acp/acp-legacy-common.c b/sound/soc/amd/acp/acp-legacy-common.c
index 3078f459e005..da80c761d657 100644
--- a/sound/soc/amd/acp/acp-legacy-common.c
+++ b/sound/soc/amd/acp/acp-legacy-common.c
@@ -208,7 +208,7 @@ static int set_acp_i2s_dma_fifo(struct snd_pcm_substream *substream,
 	struct acp_resource *rsrc = chip->rsrc;
 	struct acp_stream *stream = substream->runtime->private_data;
 	u32 reg_dma_size, reg_fifo_size, reg_fifo_addr;
-	u32 phy_addr, acp_fifo_addr, ext_int_ctrl;
+	u32 phy_addr = 0, acp_fifo_addr, ext_int_ctrl;
 	unsigned int dir = substream->stream;
 
 	switch (dai->driver->id) {
@@ -219,7 +219,10 @@ static int set_acp_i2s_dma_fifo(struct snd_pcm_substream *substream,
 					SP_PB_FIFO_ADDR_OFFSET;
 			reg_fifo_addr = ACP_I2S_TX_FIFOADDR(chip);
 			reg_fifo_size = ACP_I2S_TX_FIFOSIZE(chip);
-			phy_addr = I2S_SP_TX_MEM_WINDOW_START + stream->reg_offset;
+			if (chip->acp_rev >= ACP70_PCI_ID)
+				phy_addr = ACP7x_I2S_SP_TX_MEM_WINDOW_START;
+			else
+				phy_addr = I2S_SP_TX_MEM_WINDOW_START + stream->reg_offset;
 			writel(phy_addr, chip->base + ACP_I2S_TX_RINGBUFADDR(chip));
 		} else {
 			reg_dma_size = ACP_I2S_RX_DMA_SIZE(chip);
@@ -227,7 +230,10 @@ static int set_acp_i2s_dma_fifo(struct snd_pcm_substream *substream,
 					SP_CAPT_FIFO_ADDR_OFFSET;
 			reg_fifo_addr = ACP_I2S_RX_FIFOADDR(chip);
 			reg_fifo_size = ACP_I2S_RX_FIFOSIZE(chip);
-			phy_addr = I2S_SP_RX_MEM_WINDOW_START + stream->reg_offset;
+			if (chip->acp_rev >= ACP70_PCI_ID)
+				phy_addr = ACP7x_I2S_SP_RX_MEM_WINDOW_START;
+			else
+				phy_addr = I2S_SP_RX_MEM_WINDOW_START + stream->reg_offset;
 			writel(phy_addr, chip->base + ACP_I2S_RX_RINGBUFADDR(chip));
 		}
 		break;
@@ -238,7 +244,10 @@ static int set_acp_i2s_dma_fifo(struct snd_pcm_substream *substream,
 					BT_PB_FIFO_ADDR_OFFSET;
 			reg_fifo_addr = ACP_BT_TX_FIFOADDR(chip);
 			reg_fifo_size = ACP_BT_TX_FIFOSIZE(chip);
-			phy_addr = I2S_BT_TX_MEM_WINDOW_START + stream->reg_offset;
+			if (chip->acp_rev >= ACP70_PCI_ID)
+				phy_addr = ACP7x_I2S_BT_TX_MEM_WINDOW_START;
+			else
+				phy_addr = I2S_BT_TX_MEM_WINDOW_START + stream->reg_offset;
 			writel(phy_addr, chip->base + ACP_BT_TX_RINGBUFADDR(chip));
 		} else {
 			reg_dma_size = ACP_BT_RX_DMA_SIZE(chip);
@@ -246,7 +255,10 @@ static int set_acp_i2s_dma_fifo(struct snd_pcm_substream *substream,
 					BT_CAPT_FIFO_ADDR_OFFSET;
 			reg_fifo_addr = ACP_BT_RX_FIFOADDR(chip);
 			reg_fifo_size = ACP_BT_RX_FIFOSIZE(chip);
-			phy_addr = I2S_BT_TX_MEM_WINDOW_START + stream->reg_offset;
+			if (chip->acp_rev >= ACP70_PCI_ID)
+				phy_addr = ACP7x_I2S_BT_RX_MEM_WINDOW_START;
+			else
+				phy_addr = I2S_BT_RX_MEM_WINDOW_START + stream->reg_offset;
 			writel(phy_addr, chip->base + ACP_BT_RX_RINGBUFADDR(chip));
 		}
 		break;
@@ -257,7 +269,10 @@ static int set_acp_i2s_dma_fifo(struct snd_pcm_substream *substream,
 					HS_PB_FIFO_ADDR_OFFSET;
 			reg_fifo_addr = ACP_HS_TX_FIFOADDR;
 			reg_fifo_size = ACP_HS_TX_FIFOSIZE;
-			phy_addr = I2S_HS_TX_MEM_WINDOW_START + stream->reg_offset;
+			if (chip->acp_rev >= ACP70_PCI_ID)
+				phy_addr = ACP7x_I2S_HS_TX_MEM_WINDOW_START;
+			else
+				phy_addr = I2S_HS_TX_MEM_WINDOW_START + stream->reg_offset;
 			writel(phy_addr, chip->base + ACP_HS_TX_RINGBUFADDR);
 		} else {
 			reg_dma_size = ACP_HS_RX_DMA_SIZE;
@@ -265,7 +280,10 @@ static int set_acp_i2s_dma_fifo(struct snd_pcm_substream *substream,
 					HS_CAPT_FIFO_ADDR_OFFSET;
 			reg_fifo_addr = ACP_HS_RX_FIFOADDR;
 			reg_fifo_size = ACP_HS_RX_FIFOSIZE;
-			phy_addr = I2S_HS_RX_MEM_WINDOW_START + stream->reg_offset;
+			if (chip->acp_rev >= ACP70_PCI_ID)
+				phy_addr = ACP7x_I2S_HS_RX_MEM_WINDOW_START;
+			else
+				phy_addr = I2S_HS_RX_MEM_WINDOW_START + stream->reg_offset;
 			writel(phy_addr, chip->base + ACP_HS_RX_RINGBUFADDR);
 		}
 		break;
-- 
2.17.1
Re: [PATCH v1] ASoC: amd: acp: Audio is not resuming after s0ix
Posted by Mark Brown 2 weeks, 2 days ago
On Tue, 02 Dec 2025 23:26:14 +0530, Raghavendra Prasad Mallela wrote:
> Audio fails to resume after system exits suspend mode
> due to accessing incorrect ring buffer address during
> resume. This patch resolves issue by selecting correct
> address based on the ACP version.
> 
> 

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next

Thanks!

[1/1] ASoC: amd: acp: Audio is not resuming after s0ix
      commit: 3ee257aba1d56c3f0f1028669a8ad0f1a477f05b

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark
Re: [PATCH v1] ASoC: amd: acp: Audio is not resuming after s0ix
Posted by Mario Limonciello (AMD) (kernel.org) 2 weeks, 2 days ago

On 12/2/2025 11:56 AM, Raghavendra Prasad Mallela wrote:
> From: Hemalatha Pinnamreddy <hemalatha.pinnamreddy2@amd.com>
> 
> Audio fails to resume after system exits suspend mode
> due to accessing incorrect ring buffer address during
> resume. This patch resolves issue by selecting correct
> address based on the ACP version.
> 
> Signed-off-by: Hemalatha Pinnamreddy <hemalatha.pinnamreddy2@amd.com>
> Signed-off-by: Raghavendra Prasad Mallela <raghavendraprasad.mallela@amd.com>

Reviewed-by: Mario Limonciello (AMD) <superm1@kernel.org>
One nit below.

> ---
>   sound/soc/amd/acp/acp-legacy-common.c | 32 +++++++++++++++++++++------
>   1 file changed, 25 insertions(+), 7 deletions(-)
> 
> diff --git a/sound/soc/amd/acp/acp-legacy-common.c b/sound/soc/amd/acp/acp-legacy-common.c
> index 3078f459e005..da80c761d657 100644
> --- a/sound/soc/amd/acp/acp-legacy-common.c
> +++ b/sound/soc/amd/acp/acp-legacy-common.c
> @@ -208,7 +208,7 @@ static int set_acp_i2s_dma_fifo(struct snd_pcm_substream *substream,
>   	struct acp_resource *rsrc = chip->rsrc;
>   	struct acp_stream *stream = substream->runtime->private_data;
>   	u32 reg_dma_size, reg_fifo_size, reg_fifo_addr;
> -	u32 phy_addr, acp_fifo_addr, ext_int_ctrl;
> +	u32 phy_addr = 0, acp_fifo_addr, ext_int_ctrl;

Why initialize this variable now?

>   	unsigned int dir = substream->stream;
>   
>   	switch (dai->driver->id) {
> @@ -219,7 +219,10 @@ static int set_acp_i2s_dma_fifo(struct snd_pcm_substream *substream,
>   					SP_PB_FIFO_ADDR_OFFSET;
>   			reg_fifo_addr = ACP_I2S_TX_FIFOADDR(chip);
>   			reg_fifo_size = ACP_I2S_TX_FIFOSIZE(chip);
> -			phy_addr = I2S_SP_TX_MEM_WINDOW_START + stream->reg_offset;
> +			if (chip->acp_rev >= ACP70_PCI_ID)
> +				phy_addr = ACP7x_I2S_SP_TX_MEM_WINDOW_START;
> +			else
> +				phy_addr = I2S_SP_TX_MEM_WINDOW_START + stream->reg_offset;
>   			writel(phy_addr, chip->base + ACP_I2S_TX_RINGBUFADDR(chip));
>   		} else {
>   			reg_dma_size = ACP_I2S_RX_DMA_SIZE(chip);
> @@ -227,7 +230,10 @@ static int set_acp_i2s_dma_fifo(struct snd_pcm_substream *substream,
>   					SP_CAPT_FIFO_ADDR_OFFSET;
>   			reg_fifo_addr = ACP_I2S_RX_FIFOADDR(chip);
>   			reg_fifo_size = ACP_I2S_RX_FIFOSIZE(chip);
> -			phy_addr = I2S_SP_RX_MEM_WINDOW_START + stream->reg_offset;
> +			if (chip->acp_rev >= ACP70_PCI_ID)
> +				phy_addr = ACP7x_I2S_SP_RX_MEM_WINDOW_START;
> +			else
> +				phy_addr = I2S_SP_RX_MEM_WINDOW_START + stream->reg_offset;
>   			writel(phy_addr, chip->base + ACP_I2S_RX_RINGBUFADDR(chip));
>   		}
>   		break;
> @@ -238,7 +244,10 @@ static int set_acp_i2s_dma_fifo(struct snd_pcm_substream *substream,
>   					BT_PB_FIFO_ADDR_OFFSET;
>   			reg_fifo_addr = ACP_BT_TX_FIFOADDR(chip);
>   			reg_fifo_size = ACP_BT_TX_FIFOSIZE(chip);
> -			phy_addr = I2S_BT_TX_MEM_WINDOW_START + stream->reg_offset;
> +			if (chip->acp_rev >= ACP70_PCI_ID)
> +				phy_addr = ACP7x_I2S_BT_TX_MEM_WINDOW_START;
> +			else
> +				phy_addr = I2S_BT_TX_MEM_WINDOW_START + stream->reg_offset;
>   			writel(phy_addr, chip->base + ACP_BT_TX_RINGBUFADDR(chip));
>   		} else {
>   			reg_dma_size = ACP_BT_RX_DMA_SIZE(chip);
> @@ -246,7 +255,10 @@ static int set_acp_i2s_dma_fifo(struct snd_pcm_substream *substream,
>   					BT_CAPT_FIFO_ADDR_OFFSET;
>   			reg_fifo_addr = ACP_BT_RX_FIFOADDR(chip);
>   			reg_fifo_size = ACP_BT_RX_FIFOSIZE(chip);
> -			phy_addr = I2S_BT_TX_MEM_WINDOW_START + stream->reg_offset;
> +			if (chip->acp_rev >= ACP70_PCI_ID)
> +				phy_addr = ACP7x_I2S_BT_RX_MEM_WINDOW_START;
> +			else
> +				phy_addr = I2S_BT_RX_MEM_WINDOW_START + stream->reg_offset;
>   			writel(phy_addr, chip->base + ACP_BT_RX_RINGBUFADDR(chip));
>   		}
>   		break;
> @@ -257,7 +269,10 @@ static int set_acp_i2s_dma_fifo(struct snd_pcm_substream *substream,
>   					HS_PB_FIFO_ADDR_OFFSET;
>   			reg_fifo_addr = ACP_HS_TX_FIFOADDR;
>   			reg_fifo_size = ACP_HS_TX_FIFOSIZE;
> -			phy_addr = I2S_HS_TX_MEM_WINDOW_START + stream->reg_offset;
> +			if (chip->acp_rev >= ACP70_PCI_ID)
> +				phy_addr = ACP7x_I2S_HS_TX_MEM_WINDOW_START;
> +			else
> +				phy_addr = I2S_HS_TX_MEM_WINDOW_START + stream->reg_offset;
>   			writel(phy_addr, chip->base + ACP_HS_TX_RINGBUFADDR);
>   		} else {
>   			reg_dma_size = ACP_HS_RX_DMA_SIZE;
> @@ -265,7 +280,10 @@ static int set_acp_i2s_dma_fifo(struct snd_pcm_substream *substream,
>   					HS_CAPT_FIFO_ADDR_OFFSET;
>   			reg_fifo_addr = ACP_HS_RX_FIFOADDR;
>   			reg_fifo_size = ACP_HS_RX_FIFOSIZE;
> -			phy_addr = I2S_HS_RX_MEM_WINDOW_START + stream->reg_offset;
> +			if (chip->acp_rev >= ACP70_PCI_ID)
> +				phy_addr = ACP7x_I2S_HS_RX_MEM_WINDOW_START;
> +			else
> +				phy_addr = I2S_HS_RX_MEM_WINDOW_START + stream->reg_offset;
>   			writel(phy_addr, chip->base + ACP_HS_RX_RINGBUFADDR);
>   		}
>   		break;
Re: [PATCH v1] ASoC: amd: acp: Audio is not resuming after s0ix
Posted by Mukunda,Vijendar 2 weeks, 2 days ago
On 03/12/25 03:38, Mario Limonciello (AMD) (kernel.org) wrote:
>
>
> On 12/2/2025 11:56 AM, Raghavendra Prasad Mallela wrote:
>> From: Hemalatha Pinnamreddy <hemalatha.pinnamreddy2@amd.com>
>>
>> Audio fails to resume after system exits suspend mode
>> due to accessing incorrect ring buffer address during
>> resume. This patch resolves issue by selecting correct
>> address based on the ACP version. 
Add fixes commit
>>
>> Signed-off-by: Hemalatha Pinnamreddy <hemalatha.pinnamreddy2@amd.com>
>> Signed-off-by: Raghavendra Prasad Mallela <raghavendraprasad.mallela@amd.com>
>
> Reviewed-by: Mario Limonciello (AMD) <superm1@kernel.org>
> One nit below.
>
>> ---
>>   sound/soc/amd/acp/acp-legacy-common.c | 32 +++++++++++++++++++++------
>>   1 file changed, 25 insertions(+), 7 deletions(-)
>>
>> diff --git a/sound/soc/amd/acp/acp-legacy-common.c
>> b/sound/soc/amd/acp/acp-legacy-common.c
>> index 3078f459e005..da80c761d657 100644
>> --- a/sound/soc/amd/acp/acp-legacy-common.c
>> +++ b/sound/soc/amd/acp/acp-legacy-common.c
>> @@ -208,7 +208,7 @@ static int set_acp_i2s_dma_fifo(struct snd_pcm_substream
>> *substream,
>>       struct acp_resource *rsrc = chip->rsrc;
>>       struct acp_stream *stream = substream->runtime->private_data;
>>       u32 reg_dma_size, reg_fifo_size, reg_fifo_addr;
>> -    u32 phy_addr, acp_fifo_addr, ext_int_ctrl;
>> +    u32 phy_addr = 0, acp_fifo_addr, ext_int_ctrl;
>
> Why initialize this variable now?
>
>>       unsigned int dir = substream->stream;
>>         switch (dai->driver->id) {
>> @@ -219,7 +219,10 @@ static int set_acp_i2s_dma_fifo(struct snd_pcm_substream
>> *substream,
>>                       SP_PB_FIFO_ADDR_OFFSET;
>>               reg_fifo_addr = ACP_I2S_TX_FIFOADDR(chip);
>>               reg_fifo_size = ACP_I2S_TX_FIFOSIZE(chip);
>> -            phy_addr = I2S_SP_TX_MEM_WINDOW_START + stream->reg_offset;
>> +            if (chip->acp_rev >= ACP70_PCI_ID)
>> +                phy_addr = ACP7x_I2S_SP_TX_MEM_WINDOW_START;
>> +            else
>> +                phy_addr = I2S_SP_TX_MEM_WINDOW_START + stream->reg_offset;
>>               writel(phy_addr, chip->base + ACP_I2S_TX_RINGBUFADDR(chip));
>>           } else {
>>               reg_dma_size = ACP_I2S_RX_DMA_SIZE(chip);
>> @@ -227,7 +230,10 @@ static int set_acp_i2s_dma_fifo(struct snd_pcm_substream
>> *substream,
>>                       SP_CAPT_FIFO_ADDR_OFFSET;
>>               reg_fifo_addr = ACP_I2S_RX_FIFOADDR(chip);
>>               reg_fifo_size = ACP_I2S_RX_FIFOSIZE(chip);
>> -            phy_addr = I2S_SP_RX_MEM_WINDOW_START + stream->reg_offset;
>> +            if (chip->acp_rev >= ACP70_PCI_ID)
>> +                phy_addr = ACP7x_I2S_SP_RX_MEM_WINDOW_START;
>> +            else
>> +                phy_addr = I2S_SP_RX_MEM_WINDOW_START + stream->reg_offset;
>>               writel(phy_addr, chip->base + ACP_I2S_RX_RINGBUFADDR(chip));
>>           }
>>           break;
>> @@ -238,7 +244,10 @@ static int set_acp_i2s_dma_fifo(struct snd_pcm_substream
>> *substream,
>>                       BT_PB_FIFO_ADDR_OFFSET;
>>               reg_fifo_addr = ACP_BT_TX_FIFOADDR(chip);
>>               reg_fifo_size = ACP_BT_TX_FIFOSIZE(chip);
>> -            phy_addr = I2S_BT_TX_MEM_WINDOW_START + stream->reg_offset;
>> +            if (chip->acp_rev >= ACP70_PCI_ID)
>> +                phy_addr = ACP7x_I2S_BT_TX_MEM_WINDOW_START;
>> +            else
>> +                phy_addr = I2S_BT_TX_MEM_WINDOW_START + stream->reg_offset;
>>               writel(phy_addr, chip->base + ACP_BT_TX_RINGBUFADDR(chip));
>>           } else {
>>               reg_dma_size = ACP_BT_RX_DMA_SIZE(chip);
>> @@ -246,7 +255,10 @@ static int set_acp_i2s_dma_fifo(struct snd_pcm_substream
>> *substream,
>>                       BT_CAPT_FIFO_ADDR_OFFSET;
>>               reg_fifo_addr = ACP_BT_RX_FIFOADDR(chip);
>>               reg_fifo_size = ACP_BT_RX_FIFOSIZE(chip);
>> -            phy_addr = I2S_BT_TX_MEM_WINDOW_START + stream->reg_offset;
>> +            if (chip->acp_rev >= ACP70_PCI_ID)
>> +                phy_addr = ACP7x_I2S_BT_RX_MEM_WINDOW_START;
>> +            else
>> +                phy_addr = I2S_BT_RX_MEM_WINDOW_START + stream->reg_offset;
>>               writel(phy_addr, chip->base + ACP_BT_RX_RINGBUFADDR(chip));
>>           }
>>           break;
>> @@ -257,7 +269,10 @@ static int set_acp_i2s_dma_fifo(struct snd_pcm_substream
>> *substream,
>>                       HS_PB_FIFO_ADDR_OFFSET;
>>               reg_fifo_addr = ACP_HS_TX_FIFOADDR;
>>               reg_fifo_size = ACP_HS_TX_FIFOSIZE;
>> -            phy_addr = I2S_HS_TX_MEM_WINDOW_START + stream->reg_offset;
>> +            if (chip->acp_rev >= ACP70_PCI_ID)
>> +                phy_addr = ACP7x_I2S_HS_TX_MEM_WINDOW_START;
>> +            else
>> +                phy_addr = I2S_HS_TX_MEM_WINDOW_START + stream->reg_offset;
>>               writel(phy_addr, chip->base + ACP_HS_TX_RINGBUFADDR);
>>           } else {
>>               reg_dma_size = ACP_HS_RX_DMA_SIZE;
>> @@ -265,7 +280,10 @@ static int set_acp_i2s_dma_fifo(struct snd_pcm_substream
>> *substream,
>>                       HS_CAPT_FIFO_ADDR_OFFSET;
>>               reg_fifo_addr = ACP_HS_RX_FIFOADDR;
>>               reg_fifo_size = ACP_HS_RX_FIFOSIZE;
>> -            phy_addr = I2S_HS_RX_MEM_WINDOW_START + stream->reg_offset;
>> +            if (chip->acp_rev >= ACP70_PCI_ID)
>> +                phy_addr = ACP7x_I2S_HS_RX_MEM_WINDOW_START;
>> +            else
>> +                phy_addr = I2S_HS_RX_MEM_WINDOW_START + stream->reg_offset;
>>               writel(phy_addr, chip->base + ACP_HS_RX_RINGBUFADDR);
>>           }
>>           break;
>