From: Senchuan Zhang <zhangsenchuan@eswincomputing.com>

The ESWIN EIC7700 SoC lacks hardware support for the L2/L3 low-power
link states. It cannot enter the L2/L3 ready state through the
PME_Turn_Off/PME_To_Ack handshake protocol. To address this, add a
no_pme_handshake flag skip PME_Turn_Off broadcast and link state check
code, other driver can reuse this flag if meet the similar situation.

Signed-off-by: Yu Ning <ningyu@eswincomputing.com>
Signed-off-by: Yanghui Ou <ouyanghui@eswincomputing.com>
Signed-off-by: Senchuan Zhang <zhangsenchuan@eswincomputing.com>
---
 drivers/pci/controller/dwc/pcie-designware-host.c | 4 ++++
 drivers/pci/controller/dwc/pcie-designware.h      | 1 +
 2 files changed, 5 insertions(+)

diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
index 372207c33a85..8302bc7a6cbf 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -1168,6 +1168,9 @@ int dw_pcie_suspend_noirq(struct dw_pcie *pci)
 	if (dw_pcie_readw_dbi(pci, offset + PCI_EXP_LNKCTL) & PCI_EXP_LNKCTL_ASPM_L1)
 		return 0;

+	if (pci->no_pme_handshake)
+		goto stop_link;
+
 	if (pci->pp.ops->pme_turn_off) {
 		pci->pp.ops->pme_turn_off(&pci->pp);
 	} else {
@@ -1194,6 +1197,7 @@ int dw_pcie_suspend_noirq(struct dw_pcie *pci)
 	 */
 	udelay(1);

+stop_link:
 	dw_pcie_stop_link(pci);
 	if (pci->pp.ops->deinit)
 		pci->pp.ops->deinit(&pci->pp);
diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index 31685951a080..e8057db303d0 100644
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -549,6 +549,7 @@ struct dw_pcie {
 	 * use_parent_dt_ranges to true to avoid this warning.
 	 */
 	bool			use_parent_dt_ranges;
+	bool			no_pme_handshake;
 };

 #define to_dw_pcie_from_pp(port) container_of((port), struct dw_pcie, pp)
--
2.25.1

Hello,

On 12/2/25 10:04, zhangsenchuan@eswincomputing.com wrote:
> From: Senchuan Zhang <zhangsenchuan@eswincomputing.com>
> 
> The ESWIN EIC7700 SoC lacks hardware support for the L2/L3 low-power
> link states. It cannot enter the L2/L3 ready state through the
> PME_Turn_Off/PME_To_Ack handshake protocol. To address this, add a
> no_pme_handshake flag skip PME_Turn_Off broadcast and link state check
> code, other driver can reuse this flag if meet the similar situation.

What about testing !PME_SUPPORT in the PM Capabilities Register,
or just re-use the struct pci_dev pme_support flag ?

Regards,

> 
> Signed-off-by: Yu Ning <ningyu@eswincomputing.com>
> Signed-off-by: Yanghui Ou <ouyanghui@eswincomputing.com>
> Signed-off-by: Senchuan Zhang <zhangsenchuan@eswincomputing.com>
> ---
>   drivers/pci/controller/dwc/pcie-designware-host.c | 4 ++++
>   drivers/pci/controller/dwc/pcie-designware.h      | 1 +
>   2 files changed, 5 insertions(+)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> index 372207c33a85..8302bc7a6cbf 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> @@ -1168,6 +1168,9 @@ int dw_pcie_suspend_noirq(struct dw_pcie *pci)
>   	if (dw_pcie_readw_dbi(pci, offset + PCI_EXP_LNKCTL) & PCI_EXP_LNKCTL_ASPM_L1)
>   		return 0;
> 
> +	if (pci->no_pme_handshake)
> +		goto stop_link;
> +
>   	if (pci->pp.ops->pme_turn_off) {
>   		pci->pp.ops->pme_turn_off(&pci->pp);
>   	} else {
> @@ -1194,6 +1197,7 @@ int dw_pcie_suspend_noirq(struct dw_pcie *pci)
>   	 */
>   	udelay(1);
> 
> +stop_link:
>   	dw_pcie_stop_link(pci);
>   	if (pci->pp.ops->deinit)
>   		pci->pp.ops->deinit(&pci->pp);
> diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
> index 31685951a080..e8057db303d0 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.h
> +++ b/drivers/pci/controller/dwc/pcie-designware.h
> @@ -549,6 +549,7 @@ struct dw_pcie {
>   	 * use_parent_dt_ranges to true to avoid this warning.
>   	 */
>   	bool			use_parent_dt_ranges;
> +	bool			no_pme_handshake;
>   };
> 
>   #define to_dw_pcie_from_pp(port) container_of((port), struct dw_pcie, pp)
> --
> 2.25.1
>

> -----Original Messages-----
> From: "Christian Bruel" <christian.bruel@foss.st.com>
> Send time:Wednesday, 03/12/2025 18:09:06
> To: zhangsenchuan@eswincomputing.com, bhelgaas@google.com, mani@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, lpieralisi@kernel.org, kwilczynski@kernel.org, robh@kernel.org, p.zabel@pengutronix.de, jingoohan1@gmail.com, gustavo.pimentel@synopsys.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mayank.rana@oss.qualcomm.com, shradha.t@samsung.com, krishna.chundru@oss.qualcomm.com, thippeswamy.havalige@amd.com, inochiama@gmail.com, Frank.li@nxp.com
> Cc: ningyu@eswincomputing.com, linmin@eswincomputing.com, pinkesh.vaghela@einfochips.com, ouyanghui@eswincomputing.com
> Subject: Re: [PATCH v7 3/3] PCI: dwc: Add no_pme_handshake flag and skip PME_Turn_Off broadcast
> 
> Hello,
> 
> On 12/2/25 10:04, zhangsenchuan@eswincomputing.com wrote:
> > From: Senchuan Zhang <zhangsenchuan@eswincomputing.com>
> > 
> > The ESWIN EIC7700 SoC lacks hardware support for the L2/L3 low-power
> > link states. It cannot enter the L2/L3 ready state through the
> > PME_Turn_Off/PME_To_Ack handshake protocol. To address this, add a
> > no_pme_handshake flag skip PME_Turn_Off broadcast and link state check
> > code, other driver can reuse this flag if meet the similar situation.
> 
> What about testing !PME_SUPPORT in the PM Capabilities Register,
> or just re-use the struct pci_dev pme_support flag ?
> 

Hi, Christian

Thank you for your suggestions.
Our hardware supports generating PME#, supports L0s/L1/L1.1 low-power mode,
but L2/L3 low-power link state is not supported. It cannot enter the L2/L3
ready state through the PME_Turn_Off/PME_To_Ack handshake protocol.

Through the PM Capabilities Register, it can be seen that PME# is supported.
The pme_support flag is about whether PME# generation is supported, which is 
not very suitable for us.

Kind regards,
Senchuan Zhang

> 
> > 
> > Signed-off-by: Yu Ning <ningyu@eswincomputing.com>
> > Signed-off-by: Yanghui Ou <ouyanghui@eswincomputing.com>
> > Signed-off-by: Senchuan Zhang <zhangsenchuan@eswincomputing.com>
> > ---
> >   drivers/pci/controller/dwc/pcie-designware-host.c | 4 ++++
> >   drivers/pci/controller/dwc/pcie-designware.h      | 1 +
> >   2 files changed, 5 insertions(+)
> > 
> > diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> > index 372207c33a85..8302bc7a6cbf 100644
> > --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> > +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> > @@ -1168,6 +1168,9 @@ int dw_pcie_suspend_noirq(struct dw_pcie *pci)
> >   	if (dw_pcie_readw_dbi(pci, offset + PCI_EXP_LNKCTL) & PCI_EXP_LNKCTL_ASPM_L1)
> >   		return 0;
> > 
> > +	if (pci->no_pme_handshake)
> > +		goto stop_link;
> > +
> >   	if (pci->pp.ops->pme_turn_off) {
> >   		pci->pp.ops->pme_turn_off(&pci->pp);
> >   	} else {
> > @@ -1194,6 +1197,7 @@ int dw_pcie_suspend_noirq(struct dw_pcie *pci)
> >   	 */
> >   	udelay(1);
> > 
> > +stop_link:
> >   	dw_pcie_stop_link(pci);
> >   	if (pci->pp.ops->deinit)
> >   		pci->pp.ops->deinit(&pci->pp);
> > diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
> > index 31685951a080..e8057db303d0 100644
> > --- a/drivers/pci/controller/dwc/pcie-designware.h
> > +++ b/drivers/pci/controller/dwc/pcie-designware.h
> > @@ -549,6 +549,7 @@ struct dw_pcie {
> >   	 * use_parent_dt_ranges to true to avoid this warning.
> >   	 */
> >   	bool			use_parent_dt_ranges;
> > +	bool			no_pme_handshake;
> >   };
> > 
> >   #define to_dw_pcie_from_pp(port) container_of((port), struct dw_pcie, pp)
> > --
> > 2.25.1
> >