Various attempts have been made so far to support CPU affinity control
for (de)multiplexed interrupts. Some examples are [1] and [2]. That work
was centered around the idea to control the parent interrupt's CPU
affinity, since the child interrupt handler runs in the context of the
parent interrupt handler, on whatever CPU it was triggered.
This is a new attempt based on a different approach. Instead of touching
the parent interrupt's CPU affinity, the child interrupt is allowed to
freely change its affinity setting, independently of the parent. If the
interrupt handler happens to be triggered on an "incompatible" CPU (a
CPU that's not part of the child interrupt's affinity mask), the handler
is redirected and runs in IRQ work context on a "compatible" CPU. This
is a direct follow up to the (unsubmitted) patches that Thomas Gleixner
proposed in [3].
The first patch adds support for interrupt redirection to the IRQ core,
without making any functional change to irqchip drivers. The other two
patches modify the dwc PCI core driver to enable interrupt redirection
using the new infrastructure added in the first patch.
Thomas, however, I made a small design change to your original patches.
Instead of keeping track of the parent interrupt's affinity setting (or
rather the first CPU in its affinity mask) and attempting to pick the
same CPU for the child (as the target CPU) if possible, I just check if
the child handler fires on a CPU that's part of its affinity mask (which
is already stored anyway). As an optimization for the case when the
current CPU is *not* part of the mask and the handler needs to be
redirected, I pre-calculate and store the first CPU in the mask, at the
time when the child affinity is set. In my opinion, this is simpler and
cleaner, at the expense of a cpumask_test_cpu() call on the fast path,
because:
- It no longer needs to keep track of the parent interrupt's affinity
setting.
- If the parent interrupt can run on more than one CPU, the child can
also run on any of those CPUs without being redirected (in case the
child's affinity mask is the same as the parent's or a superset).
[1] https://lore.kernel.org/all/20220502102137.764606ee@thinkpad/
[2] https://lore.kernel.org/all/20230530214550.864894-1-rrendec@redhat.com/
[3] https://lore.kernel.org/linux-pci/878qpg4o4t.ffs@tglx/
Signed-off-by: Radu Rendec <rrendec@redhat.com>
---
Changes in v3:
- Use an Originally-by tag (instead of Signed-off-by) to attribute
initial authorship to Thomas Gleixner <tglx@linutronix.de>.
- All changes below are related to patch 1. Patches 2 and 3 are
unchanged, since they received no review comments in v2.
- Rename `fallback_cpu` to `target_cpu` to make it less confusing.
- Make a stub for demux_redirect_remote() for the !CONFIG_SMP case.
- Move all redirection code from generic_handle_demux_domain_irq() to
demux_redirect_remote(), including locking desc->lock.
- Add a short comment to explain cpumask_test_cpu(smp_processor_id(), m).
- Add a comment to explain why calling irq_work_queue_on() inside
demux_redirect_remote() is safe w.r.t. CPU unplugging.
- Move the synchronize_irqwork() call from __synchronize_hardirq() to
__synchronize_irq(), since it can sleep.
- Link to v2: https://lore.kernel.org/all/20251006223813.1688637-1-rrendec@redhat.com/
Changes in v2:
- Fix compile errors on configurations where CONFIG_SMP is disabled
- Link to v1: https://lore.kernel.org/all/20251003160421.951448-1-rrendec@redhat.com/
---
Radu Rendec (3):
genirq: Add interrupt redirection infrastructure
PCI: dwc: Code cleanup
PCI: dwc: Enable MSI affinity support
.../pci/controller/dwc/pcie-designware-host.c | 127 ++++++++----------
drivers/pci/controller/dwc/pcie-designware.h | 7 +-
include/linux/irq.h | 10 ++
include/linux/irqdesc.h | 17 ++-
kernel/irq/chip.c | 22 ++-
kernel/irq/irqdesc.c | 86 +++++++++++-
kernel/irq/manage.c | 15 ++-
7 files changed, 204 insertions(+), 80 deletions(-)
--
2.51.1