The NanoPi M5 board supports pluggable UFS modules using the UFSHC
inside its Rockchip RK3576 SoC.

Enable the respective devicetree node.

Board specific supply regulators are not added, because they are all
non-gateable descendants of other regulators marked always-on.

Signed-off-by: Alexey Charkov <alchark@gmail.com>
---
 arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts b/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts
index cce34c541f7c..6b8518c49835 100644
--- a/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts
@@ -906,6 +906,10 @@ &uart0 {
 	status = "okay";
 };
 
+&ufshc {
+	status = "okay";
+};
+
 &usbdp_phy {
 	status = "okay";
 };

---
base-commit: 663d0d1af3faefe673cabf4b6b077149a87ad71f
change-id: 20251127-nanopi-m5-ufs-52f2c5070167

Best regards,
-- 
Alexey Charkov <alchark@gmail.com>

On Thu, Nov 27, 2025 at 3:46 PM Alexey Charkov <alchark@gmail.com> wrote:
>
> The NanoPi M5 board supports pluggable UFS modules using the UFSHC
> inside its Rockchip RK3576 SoC.
>
> Enable the respective devicetree node.
>
> Board specific supply regulators are not added, because they are all
> non-gateable descendants of other regulators marked always-on.

On a second thought, I'll add those regulators in v2, and also include
a link to the relevant schematic [1]. Explicitly listing the
regulators has a slight benefit of fewer complaints from the driver at
boot time, and maybe at some point we'll want to try and remove some
of the "always-on" markings (which would require a reasonably complete
description of the power graph inside the device tree). They are also
actual devices on board and not pure aliases of other existing power
lines, which IMO qualifies them for inclusion in the DT.

FTR:
VCC_UFS is directly fed by VCC_3V3_S3, no fancy circuitry in between
VCC1V2_UFS_VCCQ is fed by VCC5V0_SYS_S5 via a DCDC buck converter,
whose EN pin is driven by VCC_3V3_S3
VCC1V8_UFS_VCCQ2 is fed by VCC_1V8_S3 via a MOSFET gated by voltage on
VDDA_1V2_S0
UFS host controller itself is part of the VCCIO7 domain, whose logic
is driven by VDD_0V75_S3 and whose VCC is fed by VDDA_1V2_S0

Will wait for 24h to elapse since v1 submission and send a v2 later today.

Best regards,
Alexey

[1] https://wiki.friendlyelec.com/wiki/images/9/97/NanoPi_M5_LP5_2411_SCH.pdf