Hi Babu, Tony, Reinette,

This series was rebased on tip/x86/cache since commit ac7de456a37f
("fs/resctrl: Update bit_usage to reflect io_alloc"). It is instead to be
merged after the inclusion of "[PATCH v12 00/10] x86,fs/resctrl: Support L3
Smart Data Cache Injection Allocation Enforcement (SDCIAE)" series [1].

As previously discussed [2], a special domain ID selector "*" has been
introduced for io_alloc_cbm that allows setting the CBM of each cache
domain to its minimum number of consecutive bits in a single operation. For
example, writing "*=0" to /sys/fs/resctrl/info/L3/io_alloc_cbm programs
each domain's CBM to the hardware-defined minimum, greatly simplifying
automation and management tasks. The user is required to specify the
correct minimum stored in /sys/fs/resctrl/info/L3/min_cbm_bits.

Please let me know your thoughts.


[1]: https://lore.kernel.org/lkml/cover.1762995456.git.babu.moger@amd.com/
[2]: https://lore.kernel.org/lkml/7e117908-41ae-4f42-8863-1361101c33ab@amd.com/


Aaron Tomlin (3):
  fs/resctrl: Add helpers to check io_alloc support and enabled state
  fs/resctrl: Return -EINVAL for a missing seq_show implementation
  x86/resctrl: Add "*" shorthand to set minimum io_alloc CBM for all
    domains

 Documentation/filesystems/resctrl.rst     |  10 ++
 arch/x86/kernel/cpu/resctrl/core.c        |   2 +-
 arch/x86/kernel/cpu/resctrl/ctrlmondata.c |  23 +--
 fs/resctrl/ctrlmondata.c                  | 182 +++++++++++++++++-----
 fs/resctrl/internal.h                     |  13 ++
 fs/resctrl/rdtgroup.c                     |   5 +-
 include/linux/resctrl.h                   |  30 +++-
 7 files changed, 211 insertions(+), 54 deletions(-)

-- 
2.51.0