From: Biju Das <biju.das.jz@bp.renesas.com>
The CANFD on RZ/{G2L,G3E} and R-Car Gen4 support 3 modes FD-Only mode,
Classical CAN mode and CAN-FD mode. In FD-Only mode, communication in
Classical CAN frame format is disabled. Document renesas,fd-only to handle
this mode. As these SoCs support 3 modes, update the description of
renesas,no-can-fd property and disallow it for R-Car Gen3.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v2->v3:
* Added check to disallow the usage of both fd-only and no-can-fd.
v1->v2:
* Added conditional check to disallow fd-only mode for R-Car Gen3.
---
.../bindings/net/can/renesas,rcar-canfd.yaml | 74 ++++++++++++++++++-
1 file changed, 71 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml b/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml
index f4ac21c68427..a504f94d0a20 100644
--- a/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml
+++ b/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml
@@ -125,9 +125,17 @@ properties:
renesas,no-can-fd:
$ref: /schemas/types.yaml#/definitions/flag
description:
- The controller can operate in either CAN FD only mode (default) or
- Classical CAN only mode. The mode is global to all channels.
- Specify this property to put the controller in Classical CAN only mode.
+ The controller can operate in either CAN-FD mode (default) or FD-Only
+ mode (RZ/{G2L,G3E} and R-Car Gen4) or Classical CAN mode. Specify this
+ property to put the controller in Classical CAN mode.
+
+ renesas,fd-only:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description:
+ The CANFD on RZ/{G2L,G3E} and R-Car Gen4 SoCs support 3 modes FD-Only
+ mode, Classical CAN mode and CAN-FD mode (default). In FD-Only mode,
+ communication in Classical CAN frame format is disabled. Specify this
+ property to put the controller in FD-Only mode.
assigned-clocks:
description:
@@ -267,6 +275,30 @@ allOf:
patternProperties:
"^channel[6-7]$": false
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - renesas,rcar-gen3-canfd
+ then:
+ properties:
+ renesas,fd-only: false
+
+ - if:
+ required:
+ - renesas,no-can-fd
+ then:
+ properties:
+ renesas,fd-only: false
+
+ - if:
+ required:
+ - renesas,fd-only
+ then:
+ properties:
+ renesas,no-can-fd: false
+
unevaluatedProperties: false
examples:
@@ -297,3 +329,39 @@ examples:
channel1 {
};
};
+
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/r9a07g044-cpg.h>
+
+ canfd1: can@10050000 {
+ compatible = "renesas,r9a07g044-canfd", "renesas,rzg2l-canfd";
+ reg = <0x10050000 0x8000>;
+ interrupts = <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "g_err", "g_recc",
+ "ch0_err", "ch0_rec", "ch0_trx",
+ "ch1_err", "ch1_rec", "ch1_trx";
+ clocks = <&cpg CPG_MOD R9A07G044_CANFD_PCLK>, <&cpg CPG_CORE R9A07G044_CLK_P0_DIV2>, <&can_clk>;
+ clock-names = "fck", "canfd", "can_clk";
+ assigned-clocks = <&cpg CPG_CORE R9A07G044_CLK_P0_DIV2>;
+ assigned-clock-rates = <50000000>;
+ resets = <&cpg R9A07G044_CANFD_RSTP_N>, <&cpg R9A07G044_CANFD_RSTC_N>;
+ reset-names = "rstp_n", "rstc_n";
+ power-domains = <&cpg>;
+ renesas,no-can-fd;
+ renesas,fd-only;
+
+ channel0 {
+ };
+
+ channel1 {
+ };
+ };
+
--
2.43.0
© 2016 - 2025 Red Hat, Inc.