The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs expose the
temperature calibration data via SMC SIP calls.

Prepare for them by moving the syscon usage into a single function, and
placing it in the chip-specific struct.

Rename the functions to match their functionality, and remove single-use
variables from the private state.

Also, move the calibration value mask into a macro.

Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
---
V3:
 * no changes

V2:
 * no changes

 drivers/thermal/renesas/rzg3e_thermal.c | 62 +++++++++++++------------
 1 file changed, 32 insertions(+), 30 deletions(-)

diff --git a/drivers/thermal/renesas/rzg3e_thermal.c b/drivers/thermal/renesas/rzg3e_thermal.c
index 3c9ff5e43d7e..d2525ad3ffcc 100644
--- a/drivers/thermal/renesas/rzg3e_thermal.c
+++ b/drivers/thermal/renesas/rzg3e_thermal.c
@@ -70,7 +70,12 @@
 #define TSU_POLL_DELAY_US	10	/* Polling interval */
 #define TSU_MIN_CLOCK_RATE	24000000  /* TSU_PCLK minimum 24MHz */
 
+#define TSU_TEMP_MASK		GENMASK(11, 0)
+
+struct rzg3e_thermal_priv;
+
 struct rzg3e_thermal_info {
+	int (*get_trim)(struct rzg3e_thermal_priv *priv);
 	int temp_d_mc;
 	int temp_e_mc;
 };
@@ -91,13 +96,11 @@ struct rzg3e_thermal_info {
 struct rzg3e_thermal_priv {
 	void __iomem *base;
 	struct device *dev;
-	struct regmap *syscon;
 	struct thermal_zone_device *zone;
 	struct reset_control *rstc;
 	const struct rzg3e_thermal_info *info;
 	u16 trmval0;
 	u16 trmval1;
-	u32 trim_offset;
 	struct mutex lock;
 };
 
@@ -334,22 +337,8 @@ static const struct thermal_zone_device_ops rzg3e_tz_ops = {
 	.set_trips = rzg3e_thermal_set_trips,
 };
 
-static int rzg3e_thermal_get_calibration(struct rzg3e_thermal_priv *priv)
+static int rzg3e_validate_calibration(struct rzg3e_thermal_priv *priv)
 {
-	u32 val;
-	int ret;
-
-	/* Read calibration values from syscon */
-	ret = regmap_read(priv->syscon, priv->trim_offset, &val);
-	if (ret)
-		return ret;
-	priv->trmval0 = val & GENMASK(11, 0);
-
-	ret = regmap_read(priv->syscon, priv->trim_offset + 4, &val);
-	if (ret)
-		return ret;
-	priv->trmval1 = val & GENMASK(11, 0);
-
 	/* Validate calibration data */
 	if (!priv->trmval0 || !priv->trmval1 ||
 	    priv->trmval0 == priv->trmval1 ||
@@ -365,17 +354,30 @@ static int rzg3e_thermal_get_calibration(struct rzg3e_thermal_priv *priv)
 	return 0;
 }
 
-static int rzg3e_thermal_parse_dt(struct rzg3e_thermal_priv *priv)
+static int rzg3e_thermal_get_syscon_trim(struct rzg3e_thermal_priv *priv)
 {
 	struct device_node *np = priv->dev->of_node;
+	struct regmap *syscon;
 	u32 offset;
+	int ret;
+	u32 val;
 
-	priv->syscon = syscon_regmap_lookup_by_phandle_args(np, "renesas,tsu-trim", 1, &offset);
-	if (IS_ERR(priv->syscon))
-		return dev_err_probe(priv->dev, PTR_ERR(priv->syscon),
+	syscon = syscon_regmap_lookup_by_phandle_args(np, "renesas,tsu-trim", 1, &offset);
+	if (IS_ERR(syscon))
+		return dev_err_probe(priv->dev, PTR_ERR(syscon),
 				     "Failed to parse renesas,tsu-trim\n");
 
-	priv->trim_offset = offset;
+	/* Read calibration values from syscon */
+	ret = regmap_read(syscon, offset, &val);
+	if (ret)
+		return ret;
+	priv->trmval0 = val & TSU_TEMP_MASK;
+
+	ret = regmap_read(syscon, offset + 4, &val);
+	if (ret)
+		return ret;
+	priv->trmval1 = val & TSU_TEMP_MASK;
+
 	return 0;
 }
 
@@ -402,11 +404,16 @@ static int rzg3e_thermal_probe(struct platform_device *pdev)
 	if (IS_ERR(priv->base))
 		return PTR_ERR(priv->base);
 
-	/* Parse device tree for trim register info */
-	ret = rzg3e_thermal_parse_dt(priv);
+	ret = priv->info->get_trim(priv);
 	if (ret)
 		return ret;
 
+	/* Validate calibration data */
+	ret = rzg3e_validate_calibration(priv);
+	if (ret)
+		return dev_err_probe(dev, ret,
+				     "Failed to get valid calibration data\n");
+
 	/* Get clock to verify frequency - clock is managed by power domain */
 	clk = devm_clk_get(dev, NULL);
 	if (IS_ERR(clk))
@@ -423,12 +430,6 @@ static int rzg3e_thermal_probe(struct platform_device *pdev)
 		return dev_err_probe(dev, PTR_ERR(priv->rstc),
 				     "Failed to get/deassert reset control\n");
 
-	/* Get calibration data */
-	ret = rzg3e_thermal_get_calibration(priv);
-	if (ret)
-		return dev_err_probe(dev, ret,
-				     "Failed to get valid calibration data\n");
-
 	/* Get comparison interrupt */
 	irq = platform_get_irq_byname(pdev, "adcmpi");
 	if (irq < 0)
@@ -533,6 +534,7 @@ static const struct dev_pm_ops rzg3e_thermal_pm_ops = {
 };
 
 static const struct rzg3e_thermal_info rzg3e_thermal_info = {
+	.get_trim = rzg3e_thermal_get_syscon_trim,
 	.temp_d_mc = -41000,
 	.temp_e_mc = 126000,
 };
-- 
2.52.0

Hi Cosmin,

On Wed, 26 Nov 2025 at 14:05, Cosmin Tanislav
<cosmin-gabriel.tanislav.xa@renesas.com> wrote:
> The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs expose the
> temperature calibration data via SMC SIP calls.
>
> Prepare for them by moving the syscon usage into a single function, and
> placing it in the chip-specific struct.
>
> Rename the functions to match their functionality, and remove single-use
> variables from the private state.
>
> Also, move the calibration value mask into a macro.
>
> Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>

Thanks for your patch!

> --- a/drivers/thermal/renesas/rzg3e_thermal.c
> +++ b/drivers/thermal/renesas/rzg3e_thermal.c
> @@ -70,7 +70,12 @@
>  #define TSU_POLL_DELAY_US      10      /* Polling interval */
>  #define TSU_MIN_CLOCK_RATE     24000000  /* TSU_PCLK minimum 24MHz */
>
> +#define TSU_TEMP_MASK          GENMASK(11, 0)

This is the value same as the existing TSU_CODE_MAX definition.

> +
> +struct rzg3e_thermal_priv;
> +
>  struct rzg3e_thermal_info {
> +       int (*get_trim)(struct rzg3e_thermal_priv *priv);
>         int temp_d_mc;
>         int temp_e_mc;
>  };

> @@ -334,22 +337,8 @@ static const struct thermal_zone_device_ops rzg3e_tz_ops = {
>         .set_trips = rzg3e_thermal_set_trips,
>  };
>
> -static int rzg3e_thermal_get_calibration(struct rzg3e_thermal_priv *priv)
> +static int rzg3e_validate_calibration(struct rzg3e_thermal_priv *priv)
>  {
> -       u32 val;
> -       int ret;
> -
> -       /* Read calibration values from syscon */
> -       ret = regmap_read(priv->syscon, priv->trim_offset, &val);
> -       if (ret)
> -               return ret;
> -       priv->trmval0 = val & GENMASK(11, 0);
> -
> -       ret = regmap_read(priv->syscon, priv->trim_offset + 4, &val);
> -       if (ret)
> -               return ret;
> -       priv->trmval1 = val & GENMASK(11, 0);
> -
>         /* Validate calibration data */

I think this comment can be dropped, as this is clear from the
function name.

>         if (!priv->trmval0 || !priv->trmval1 ||
>             priv->trmval0 == priv->trmval1 ||

> @@ -402,11 +404,16 @@ static int rzg3e_thermal_probe(struct platform_device *pdev)
>         if (IS_ERR(priv->base))
>                 return PTR_ERR(priv->base);
>
> -       /* Parse device tree for trim register info */
> -       ret = rzg3e_thermal_parse_dt(priv);
> +       ret = priv->info->get_trim(priv);
>         if (ret)
>                 return ret;
>
> +       /* Validate calibration data */

Obvious, so please drop this comment.

> +       ret = rzg3e_validate_calibration(priv);
> +       if (ret)
> +               return dev_err_probe(dev, ret,
> +                                    "Failed to get valid calibration data\n");

rzg3e_validate_calibration() already prints its own error message.
As this function became small, perhaps inline it here, and use a single
dev_err_probe() in case of failure?

> +
>         /* Get clock to verify frequency - clock is managed by power domain */
>         clk = devm_clk_get(dev, NULL);
>         if (IS_ERR(clk))

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds