[v2] x86/irq: Bugfix and cleanup for posted MSI interrupts

[patch V2 0/3] x86/irq: Bugfix and cleanup for posted MSI interrupts

Posted by Thomas Gleixner 2 months, 1 week ago

A small update to V1 which can be found here:

  https://lore.kernel.org/lkml/20251125101912.564125647@linutronix.de

Luigi reported that the retrigger mechanism for posted MSI interrupts is
broken. That happens because retrigger sends an IPI to the actual allocated
vector, which is handled correctly, but lacks an EOI. That leaves a stale
APIC ISR bit around.

The following series addresses this and does some related cleanups in that
area on top.

Changes vs. V1:

   Use __this_cpu_*() - Luigi

Thanks,

	tglx
---
 arch/x86/include/asm/irq_remapping.h |   12 ++++++-
 arch/x86/kernel/irq.c                |   54 +++++++++++++++++++++++------------
 drivers/iommu/intel/irq_remapping.c  |   12 +++----
 3 files changed, 52 insertions(+), 26 deletions(-)

Re: [patch V2 0/3] x86/irq: Bugfix and cleanup for posted MSI interrupts

Posted by Luigi Rizzo 1 month, 3 weeks ago

On Tue, Nov 25, 2025 at 10:50 PM Thomas Gleixner <tglx@linutronix.de> wrote:
>
> A small update to V1 which can be found here:
>
>   https://lore.kernel.org/lkml/20251125101912.564125647@linutronix.de
>
> Luigi reported that the retrigger mechanism for posted MSI interrupts is
> broken. That happens because retrigger sends an IPI to the actual allocated
> vector, which is handled correctly, but lacks an EOI. That leaves a stale
> APIC ISR bit around.
>
> The following series addresses this and does some related cleanups in that
> area on top.

What is happening with this series, is there any blocker ?

cheers
luigi

Re: [patch V2 0/3] x86/irq: Bugfix and cleanup for posted MSI interrupts

Posted by Thomas Gleixner 1 month, 3 weeks ago

On Wed, Dec 17 2025 at 18:03, Luigi Rizzo wrote:
> On Tue, Nov 25, 2025 at 10:50 PM Thomas Gleixner <tglx@linutronix.de> wrote:
>>
>> A small update to V1 which can be found here:
>>
>>   https://lore.kernel.org/lkml/20251125101912.564125647@linutronix.de
>>
>> Luigi reported that the retrigger mechanism for posted MSI interrupts is
>> broken. That happens because retrigger sends an IPI to the actual allocated
>> vector, which is handled correctly, but lacks an EOI. That leaves a stale
>> APIC ISR bit around.
>>
>> The following series addresses this and does some related cleanups in that
>> area on top.
>
> What is happening with this series, is there any blocker ?

I don't think so. It's probably because people were traveling to Japan
or distracted otherwise. I'll take care of it now.

Thanks,

        tglx