On Mon, 24 Nov 2025 11:59:24 +0000
<ankita@nvidia.com> wrote:
> From: Ankit Agrawal <ankita@nvidia.com>
>
> Split the function that check for the GPU device being ready on
> the probe.
>
> Move the code to wait for the GPU to be ready through BAR0 register
> reads to a separate function. This would help reuse the code.
>
> Signed-off-by: Ankit Agrawal <ankita@nvidia.com>
> ---
> drivers/vfio/pci/nvgrace-gpu/main.c | 33 ++++++++++++++++++-----------
> 1 file changed, 21 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/vfio/pci/nvgrace-gpu/main.c b/drivers/vfio/pci/nvgrace-gpu/main.c
> index c84c01954c9e..3e45b8bd1a89 100644
> --- a/drivers/vfio/pci/nvgrace-gpu/main.c
> +++ b/drivers/vfio/pci/nvgrace-gpu/main.c
> @@ -130,6 +130,24 @@ static void nvgrace_gpu_close_device(struct vfio_device *core_vdev)
> vfio_pci_core_close_device(core_vdev);
> }
>
> +static int nvgrace_gpu_wait_device_ready(void __iomem *io)
> +{
> + unsigned long timeout = jiffies + msecs_to_jiffies(POLL_TIMEOUT_MS);
> + int ret = -ETIME;
> +
> + do {
> + if ((ioread32(io + C2C_LINK_BAR0_OFFSET) == STATUS_READY) &&
> + (ioread32(io + HBM_TRAINING_BAR0_OFFSET) == STATUS_READY)) {
> + ret = 0;
> + goto ready_check_exit;
> + }
> + msleep(POLL_QUANTUM_MS);
> + } while (!time_after(jiffies, timeout));
> +
> +ready_check_exit:
> + return ret;
> +}
> +
> static vm_fault_t nvgrace_gpu_vfio_pci_huge_fault(struct vm_fault *vmf,
> unsigned int order)
> {
> @@ -930,9 +948,8 @@ static bool nvgrace_gpu_has_mig_hw_bug(struct pci_dev *pdev)
> * Ensure that the BAR0 region is enabled before accessing the
> * registers.
> */
> -static int nvgrace_gpu_wait_device_ready(struct pci_dev *pdev)
> +static int nvgrace_gpu_probe_check_device_ready(struct pci_dev *pdev)
> {
> - unsigned long timeout = jiffies + msecs_to_jiffies(POLL_TIMEOUT_MS);
> void __iomem *io;
> int ret = -ETIME;
>
> @@ -950,16 +967,8 @@ static int nvgrace_gpu_wait_device_ready(struct pci_dev *pdev)
> goto iomap_exit;
> }
>
> - do {
> - if ((ioread32(io + C2C_LINK_BAR0_OFFSET) == STATUS_READY) &&
> - (ioread32(io + HBM_TRAINING_BAR0_OFFSET) == STATUS_READY)) {
> - ret = 0;
> - goto reg_check_exit;
> - }
> - msleep(POLL_QUANTUM_MS);
> - } while (!time_after(jiffies, timeout));
> + ret = nvgrace_gpu_wait_device_ready(io);
I think you're inadvertently fixing a bug here too. The ret
initialization to -ETIME is immediately clobbered by
pci_enable_device(), so exceeding the timeout would never generate an
error. Now it will:
Fixes: d85f69d520e6 ("vfio/nvgrace-gpu: Check the HBM training and C2C link status")
Also we should remove the ret initialization. Otherwise the series
LGTM. Thanks,
Alex
>
> -reg_check_exit:
> pci_iounmap(pdev, io);
> iomap_exit:
> pci_release_selected_regions(pdev, 1 << 0);
> @@ -976,7 +985,7 @@ static int nvgrace_gpu_probe(struct pci_dev *pdev,
> u64 memphys, memlength;
> int ret;
>
> - ret = nvgrace_gpu_wait_device_ready(pdev);
> + ret = nvgrace_gpu_probe_check_device_ready(pdev);
> if (ret)
> return ret;
>