This patch series addresses a SerDes power-up failure observed on the
QCS8300 Ride board using the phy-qcom-sgmii-eth driver. The issue occurs
because the SerDes PHY requires both L5A and L4A regulators to be
enabled during initialization. If either one of them is disabled, the
status register does not reset, and the Ethernet interface fails to come
up due to a timeout:
[ 77.105651] qcom-dwmac-sgmii-phy 8909000.phy: QSERDES_COM_C_READY_STATUS timed-out
[ 77.113447] qcom-ethqos 23040000.ethernet eth0: __stmmac_open: Serdes powerup failed
Presumably, the issue is not seen on all users of this PHY because both
regulators are often shared with other peripherals. However, the power
rail schematics for boards using this SerDes PHY show that it is
supplied by both L5A (1.2V) and L4A (0.9V) regulators.
This series has been tested on the QCS8300 Ride board, and the reported
issue was resolved. All Monaco and Lemans derivative boards require this
new configuration as they use the same SerDes PHY.
Signed-off-by: Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com>
---
Mohd Ayaan Anwar (6):
dt-bindings: phy: describe additional regulator for Qualcomm SGMII PHY
arm64: dts: qcom: lemans-evk: add additional SerDes PHY regulator
arm64: dts: qcom: lemans-ride-common: add additional SerDes PHY regulators
arm64: dts: qcom: monaco-evk: fix the SerDes PHY regulators
arm64: dts: qcom: qcs8300-ride: add additional SerDes PHY regulator
phy: qcom: sgmii-eth: add second regulator support
.../bindings/phy/qcom,sa8775p-dwmac-sgmii-phy.yaml | 4 ++++
arch/arm64/boot/dts/qcom/lemans-evk.dts | 1 +
arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi | 4 ++++
arch/arm64/boot/dts/qcom/monaco-evk.dts | 3 ++-
arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 2 ++
drivers/phy/qualcomm/phy-qcom-sgmii-eth.c | 24 +++++++++++++++++++++-
6 files changed, 36 insertions(+), 2 deletions(-)
---
base-commit: 0f2995693867bfb26197b117cd55624ddc57582f
change-id: 20251124-sgmiieth_serdes_regulator-027fc6b15216
Best regards,
--
Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com>