On Mon, Nov 24, 2025 at 02:24:33AM -0800, Qiang Yu wrote:
> Describe PCIe PHY. Also add required system resources like regulators,
> clocks and registers configuration for PCIe PHY.
>
Hi Vinod,
Could you please have a look at this patch series. I have rebased it to
latest linux-phy next branch.
- Qiang Yu
> Changes in v4:
> - Rebase on latest linux-phy next branch
> - Add reviewed-by tag
> - Link to v3: https://lore.kernel.org/all/20251103-kaanapali-pcie-phy-v3-0-18b0f27c7e96@oss.qualcomm.com/
>
> Changes in v3:
> - Rebase on 20251017045919.34599-2-krzysztof.kozlowski@linaro.org
> - Add reviewed-by tag
> - Remove [PATCH v2 1/6] since it was applied
> - Link to v2: https://lore.kernel.org/all/20251015-kaanapali-pcie-upstream-v2-0-84fa7ea638a1@oss.qualcomm.com/
>
> Changes in v2:
> - Rewrite commit msg for PATCH[3/6]
> - Keep keep pcs-pcie reigster definitions sorted.
> - Add Reviewed-by tag.
> - Keep qmp_pcie_of_match_table sorted.
> - Link to v1: https://lore.kernel.org/all/20250924-knp-pcie-v1-0-5fb59e398b83@oss.qualcomm.com/
>
> Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
> ---
> Qiang Yu (5):
> dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Add Kaanapali compatible
> phy: qcom-qmp: qserdes-txrx: Add complete QMP PCIe PHY v8 register offsets
> phy: qcom-qmp: pcs-pcie: Add v8 register offsets
> phy: qcom-qmp: qserdes-com: Add some more v8 register offsets
> phy: qcom: qmp-pcie: add QMP PCIe PHY tables for Kaanapali
>
> .../bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 3 +
> drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 194 +++++++++++++++++++++
> drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v8.h | 34 ++++
> drivers/phy/qualcomm/phy-qcom-qmp-qserdes-com-v8.h | 11 ++
> .../qualcomm/phy-qcom-qmp-qserdes-txrx-pcie-v8.h | 71 ++++++++
> 5 files changed, 313 insertions(+)
> ---
> base-commit: 3b64ea4768e7e64b2d9ae5833dbcac19f6212145
> change-id: 20251124-kaanapali-pcie-phy-31968b2b2916
>
> Best regards,
> --
> Qiang Yu <qiang.yu@oss.qualcomm.com>
>