On Mon, Nov 24, 2025 at 10:57:49AM -0500, Frank Li wrote:
> On Mon, Nov 24, 2025 at 01:50:22PM +0100, Jean-Michel Hautbois wrote:
> > Add dma_wmb() barrier after filling TCD descriptors to ensure all
> > descriptor writes are visible to the DMA engine before starting
> > transfers. This prevents potential race conditions where the DMA
> > hardware might read partially written descriptors.
> >
> > Signed-off-by: Jean-Michel Hautbois <jeanmichel.hautbois@yoseli.org>
> > ---
> > drivers/dma/fsl-edma-common.c | 3 +++
> > 1 file changed, 3 insertions(+)
> >
> > diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c
> > index 4976d7dde08090d16277af4b9f784b9745485320..db36a6aafc910364d75ce6c5d334fd19d2120b6b 100644
> > --- a/drivers/dma/fsl-edma-common.c
> > +++ b/drivers/dma/fsl-edma-common.c
> > @@ -553,6 +553,9 @@ void fsl_edma_fill_tcd(struct fsl_edma_chan *fsl_chan,
> > fsl_edma_set_tcd_to_le(fsl_chan, tcd, csr, csr);
> >
> > trace_edma_fill_tcd(fsl_chan, tcd);
> > +
> > + /* Ensure descriptor writes are visible to DMA engine */
> > + dma_wmb();
>
> This is not necessary because there are writel() in
> fsl_edma_issue_pending(), which will do memory barrier in writel().
>
> currently, edma use vchan, descriptior have not dymantically to appending
> to running queue. so writel() in fsl_edma_issue_pending() is enough.
>
> Even though edma will support append to running queue in future, dma_wmd()
> should be just before update csr.
>
> dma_wmb(); // just before indicate TCD is ready to use.
> fsl_edma_set_tcd_to_le(fsl_chan, tcd, csr, csr);
>
Thanks for you detailed explanation, I will remove this commit from v2
:-).
JM
> Frank
> > }
> >
> > static struct fsl_edma_desc *fsl_edma_alloc_desc(struct fsl_edma_chan *fsl_chan,
> >
> > --
> > 2.39.5
> >