The Renesas RZ/T2H and RZ/N2H SoCs have IRQ-capable pins handled by the
ICU, which forwards them to the GIC.

The ICU supports 16 IRQ lines, the pins map to these lines arbitrarily,
and the mapping is not configurable.

Add a GPIO IRQ chip that can be used to configure these pins as IRQ
lines, and add the user switches present on the board.

The ICU driver has been submitted as part of a separate series [1].

[1]: https://lore.kernel.org/lkml/20251121111423.1379395-1-cosmin-gabriel.tanislav.xa@renesas.com/

Cosmin Tanislav (8):
  pinctrl: renesas: rzt2h: move GPIO enable/disable into separate
    function
  pinctrl: renesas: rzt2h: allow .get_direction() for IRQ function GPIOs
  dt-bindings: pinctrl: renesas,r9a09g077-pinctrl: Document GPIO IRQ
  pinctrl: renesas: rzt2h: add GPIO IRQ chip to handle interrupts
  arm64: dts: renesas: r9a09g077: add GPIO IRQ support
  arm64: dts: renesas: r9a09g087: add GPIO IRQ support
  arm64: dts: renesas: r9a09g077m44-rzt2h-evk: add GPIO keys
  arm64: dts: renesas: r9a09g087m44-rzn2h-evk: add GPIO keys

 .../pinctrl/renesas,r9a09g077-pinctrl.yaml    |  15 ++
 arch/arm64/boot/dts/renesas/r9a09g077.dtsi    |   3 +
 .../dts/renesas/r9a09g077m44-rzt2h-evk.dts    |  33 +++
 arch/arm64/boot/dts/renesas/r9a09g087.dtsi    |   3 +
 .../dts/renesas/r9a09g087m44-rzn2h-evk.dts    |  30 +++
 drivers/pinctrl/renesas/pinctrl-rzt2h.c       | 241 +++++++++++++++++-
 6 files changed, 316 insertions(+), 9 deletions(-)

-- 
2.52.0