drivers/mmc/host/sdhci-of-dwcmshc.c | 1 + 1 file changed, 1 insertion(+)
When I added command queue engine (CQE) support for the Rockchip eMMC
controller, I missed that RK3576 has a separate platform data struct.
While things are working fine on RK3588 (I tested the ROCK 5B) and
the suspend issue is fixed on the RK3576 (I tested the Sige5), this
results in stability issues. By also adding the necessary hooks for
the RK3576 platform the following problems can be avoided:
[ 15.606895] mmc0: running CQE recovery
[ 15.616189] mmc0: running CQE recovery
[...]
[ 25.911484] mmc0: running CQE recovery
[ 25.926305] mmc0: running CQE recovery
[ 25.927468] mmc0: running CQE recovery
[...]
[ 26.255719] mmc0: running CQE recovery
[ 26.257162] ------------[ cut here ]------------
[ 26.257581] mmc0: cqhci: spurious TCN for tag 31
[ 26.258034] WARNING: CPU: 0 PID: 0 at drivers/mmc/host/cqhci-core.c:796 cqhci_irq+0x440/0x68c
[ 26.263786] CPU: 0 UID: 0 PID: 0 Comm: swapper/0 Not tainted 6.18.0-rc6-gd984ebbf0d15 #1 PREEMPT
[ 26.264561] Hardware name: ArmSoM Sige5 (DT)
[...]
[ 26.272748] Call trace:
[ 26.272964] cqhci_irq+0x440/0x68c (P)
[ 26.273296] dwcmshc_cqe_irq_handler+0x54/0x88
[ 26.273689] sdhci_irq+0xbc/0x1200
[ 26.273991] __handle_irq_event_percpu+0x54/0x1d0
[...]
Note that the above problems do not necessarily happen with every boot.
Reported-by: Adrian Hunter <adrian.hunter@intel.com>
Closes: https://lore.kernel.org/linux-rockchip/01949bc9-4873-498b-ac7d-f008393ccc4c@intel.com/
Fixes: fda1e0af7c28f ("mmc: sdhci-of-dwcmshc: Add command queue support for rockchip SOCs")
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
---
Sorry for the delay in sending this :)
---
drivers/mmc/host/sdhci-of-dwcmshc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c
index c66a8dfad47c..ee0008d91b98 100644
--- a/drivers/mmc/host/sdhci-of-dwcmshc.c
+++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
@@ -1767,6 +1767,7 @@ static const struct dwcmshc_pltfm_data sdhci_dwcmshc_rk3576_pdata = {
.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
},
+ .cqhci_host_ops = &rk35xx_cqhci_ops,
.init = dwcmshc_rk35xx_init,
.postinit = dwcmshc_rk3576_postinit,
};
---
base-commit: dcbce328d3a2d87770133834210cf328c083d480
change-id: 20251121-rockchip-emmc-cqe-rk3576-fix-ec8ac72e6e32
Best regards,
--
Sebastian Reichel <sebastian.reichel@collabora.com>
On Fri, 21 Nov 2025 at 17:27, Sebastian Reichel
<sebastian.reichel@collabora.com> wrote:
>
> When I added command queue engine (CQE) support for the Rockchip eMMC
> controller, I missed that RK3576 has a separate platform data struct.
> While things are working fine on RK3588 (I tested the ROCK 5B) and
> the suspend issue is fixed on the RK3576 (I tested the Sige5), this
> results in stability issues. By also adding the necessary hooks for
> the RK3576 platform the following problems can be avoided:
>
> [ 15.606895] mmc0: running CQE recovery
> [ 15.616189] mmc0: running CQE recovery
> [...]
> [ 25.911484] mmc0: running CQE recovery
> [ 25.926305] mmc0: running CQE recovery
> [ 25.927468] mmc0: running CQE recovery
> [...]
> [ 26.255719] mmc0: running CQE recovery
> [ 26.257162] ------------[ cut here ]------------
> [ 26.257581] mmc0: cqhci: spurious TCN for tag 31
> [ 26.258034] WARNING: CPU: 0 PID: 0 at drivers/mmc/host/cqhci-core.c:796 cqhci_irq+0x440/0x68c
> [ 26.263786] CPU: 0 UID: 0 PID: 0 Comm: swapper/0 Not tainted 6.18.0-rc6-gd984ebbf0d15 #1 PREEMPT
> [ 26.264561] Hardware name: ArmSoM Sige5 (DT)
> [...]
> [ 26.272748] Call trace:
> [ 26.272964] cqhci_irq+0x440/0x68c (P)
> [ 26.273296] dwcmshc_cqe_irq_handler+0x54/0x88
> [ 26.273689] sdhci_irq+0xbc/0x1200
> [ 26.273991] __handle_irq_event_percpu+0x54/0x1d0
> [...]
>
> Note that the above problems do not necessarily happen with every boot.
>
> Reported-by: Adrian Hunter <adrian.hunter@intel.com>
> Closes: https://lore.kernel.org/linux-rockchip/01949bc9-4873-498b-ac7d-f008393ccc4c@intel.com/
> Fixes: fda1e0af7c28f ("mmc: sdhci-of-dwcmshc: Add command queue support for rockchip SOCs")
> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Applied for next, thanks!
Kind regards
Uffe
> ---
> Sorry for the delay in sending this :)
> ---
> drivers/mmc/host/sdhci-of-dwcmshc.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c
> index c66a8dfad47c..ee0008d91b98 100644
> --- a/drivers/mmc/host/sdhci-of-dwcmshc.c
> +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
> @@ -1767,6 +1767,7 @@ static const struct dwcmshc_pltfm_data sdhci_dwcmshc_rk3576_pdata = {
> .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
> SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
> },
> + .cqhci_host_ops = &rk35xx_cqhci_ops,
> .init = dwcmshc_rk35xx_init,
> .postinit = dwcmshc_rk3576_postinit,
> };
>
> ---
> base-commit: dcbce328d3a2d87770133834210cf328c083d480
> change-id: 20251121-rockchip-emmc-cqe-rk3576-fix-ec8ac72e6e32
>
> Best regards,
> --
> Sebastian Reichel <sebastian.reichel@collabora.com>
>
在 2025/11/22 星期六 0:26, Sebastian Reichel 写道:
> When I added command queue engine (CQE) support for the Rockchip eMMC
> controller, I missed that RK3576 has a separate platform data struct.
> While things are working fine on RK3588 (I tested the ROCK 5B) and
> the suspend issue is fixed on the RK3576 (I tested the Sige5), this
> results in stability issues. By also adding the necessary hooks for
> the RK3576 platform the following problems can be avoided:
>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
> [ 15.606895] mmc0: running CQE recovery
> [ 15.616189] mmc0: running CQE recovery
> [...]
> [ 25.911484] mmc0: running CQE recovery
> [ 25.926305] mmc0: running CQE recovery
> [ 25.927468] mmc0: running CQE recovery
> [...]
> [ 26.255719] mmc0: running CQE recovery
> [ 26.257162] ------------[ cut here ]------------
> [ 26.257581] mmc0: cqhci: spurious TCN for tag 31
> [ 26.258034] WARNING: CPU: 0 PID: 0 at drivers/mmc/host/cqhci-core.c:796 cqhci_irq+0x440/0x68c
> [ 26.263786] CPU: 0 UID: 0 PID: 0 Comm: swapper/0 Not tainted 6.18.0-rc6-gd984ebbf0d15 #1 PREEMPT
> [ 26.264561] Hardware name: ArmSoM Sige5 (DT)
> [...]
> [ 26.272748] Call trace:
> [ 26.272964] cqhci_irq+0x440/0x68c (P)
> [ 26.273296] dwcmshc_cqe_irq_handler+0x54/0x88
> [ 26.273689] sdhci_irq+0xbc/0x1200
> [ 26.273991] __handle_irq_event_percpu+0x54/0x1d0
> [...]
>
> Note that the above problems do not necessarily happen with every boot.
>
> Reported-by: Adrian Hunter <adrian.hunter@intel.com>
> Closes: https://lore.kernel.org/linux-rockchip/01949bc9-4873-498b-ac7d-f008393ccc4c@intel.com/
> Fixes: fda1e0af7c28f ("mmc: sdhci-of-dwcmshc: Add command queue support for rockchip SOCs")
> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
> ---
> Sorry for the delay in sending this :)
> ---
> drivers/mmc/host/sdhci-of-dwcmshc.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c
> index c66a8dfad47c..ee0008d91b98 100644
> --- a/drivers/mmc/host/sdhci-of-dwcmshc.c
> +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
> @@ -1767,6 +1767,7 @@ static const struct dwcmshc_pltfm_data sdhci_dwcmshc_rk3576_pdata = {
> .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
> SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
> },
> + .cqhci_host_ops = &rk35xx_cqhci_ops,
> .init = dwcmshc_rk35xx_init,
> .postinit = dwcmshc_rk3576_postinit,
> };
>
> ---
> base-commit: dcbce328d3a2d87770133834210cf328c083d480
> change-id: 20251121-rockchip-emmc-cqe-rk3576-fix-ec8ac72e6e32
>
> Best regards,
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