On Thu, Nov 20, 2025 at 04:29:41PM +0800, Hal Feng wrote:
> VisionFive 2 Lite is a mini SBC based on the StarFive JH7110S industrial
> SoC which can run at -40~85 degrees centigrade and up to 1.25GHz.
>
> Board features:
> - JH7110S SoC
> - 4/8 GiB LPDDR4 DRAM
> - AXP15060 PMIC
> - 40 pin GPIO header
> - 1x USB 3.0 host port
> - 3x USB 2.0 host port
> - 1x M.2 M-Key (size: 2242)
> - 1x MicroSD slot (optional non-removable 64GiB eMMC)
> - 1x QSPI Flash
> - 1x I2C EEPROM
> - 1x 1Gbps Ethernet port
> - SDIO-based Wi-Fi & UART-based Bluetooth
> - 1x HDMI port
> - 1x 2-lane DSI
> - 1x 2-lane CSI
>
> VisionFive 2 Lite schematics: https://doc-en.rvspace.org/VisionFive2Lite/PDF/VF2_LITE_V1.10_TF_20250818_SCH.pdf
> VisionFive 2 Lite Quick Start Guide: https://doc-en.rvspace.org/VisionFive2Lite/VisionFive2LiteQSG/index.html
> More documents: https://doc-en.rvspace.org/Doc_Center/visionfive_2_lite.html
>
> Changes since v2:
> - Drop patch 3, 4, 5.
> patch 6:
> - jh7110s-starfive-visionfive-2-lite.dtsi directly includes "jh7110.dtsi"
> instead of "jh7110s-common.dtsi".
>
> Changes since v1:
> - Drop patch 1 because it is applied.
> - Rename jh7110.dtsi to jh711x.dtsi.
> - Move the content of jh7110-common.dtsi to the new file
> jh711x-common.dtsi and move opp table to jh7110-common.dtsi.
> patch 4:
> - Move the uncommon nodes to jh7110-common.dtsi instead of board dts.
> patch 5:
> - Add jh7110s-common.dtsi and include it in jh7110s-starfive-visionfive-2-lite.dtsi.
>
> Changes since RFC:
> - Add jh7110s compatible to the generic cpufreq driver.
> - Fix the dtbs_check error by adding the missing "enable-gpios" property
> in jh7110 pcie dt-bindings.
> - Rebase on the latest mainline.
> - Add VisionFive 2 Lite eMMC board device tree and add a common board dtsi
> for VisionFive 2 Lite variants.
> - Add usb switch pin configuration (GPIO62).
> - Improve the commit messages.
>
> History:
> v2: https://lore.kernel.org/all/20251107095530.114775-1-hal.feng@starfivetech.com/
> v1: https://lore.kernel.org/all/20251016080054.12484-1-hal.feng@starfivetech.com/
> RFC: https://lore.kernel.org/all/20250821100930.71404-1-hal.feng@starfivetech.com/
>
> Hal Feng (5):
> dt-bindings: PCI: starfive,jh7110-pcie: Add enable-gpios property
> dt-bindings: riscv: Add StarFive JH7110S SoC and VisionFive 2 Lite
> board
> riscv: dts: starfive: Add common board dtsi for VisionFive 2 Lite
> variants
> riscv: dts: starfive: Add VisionFive 2 Lite board device tree
> riscv: dts: starfive: Add VisionFive 2 Lite eMMC board device tree
>
> .../bindings/pci/starfive,jh7110-pcie.yaml | 4 +
> .../devicetree/bindings/riscv/starfive.yaml | 6 +
> arch/riscv/boot/dts/starfive/Makefile | 3 +
> ...h7110s-starfive-visionfive-2-lite-emmc.dts | 22 +
> .../jh7110s-starfive-visionfive-2-lite.dts | 20 +
> .../jh7110s-starfive-visionfive-2-lite.dtsi | 691 ++++++++++++++++++
> 6 files changed, 746 insertions(+)
> create mode 100644 arch/riscv/boot/dts/starfive/jh7110s-starfive-visionfive-2-lite-emmc.dts
> create mode 100644 arch/riscv/boot/dts/starfive/jh7110s-starfive-visionfive-2-lite.dts
> create mode 100644 arch/riscv/boot/dts/starfive/jh7110s-starfive-visionfive-2-lite.dtsi
>
>
> base-commit: fe4d0dea039f2befb93f27569593ec209843b0f5
> --
Tested against v6.18-rc6 together with
fa939a287224d ("dts: starfive: jh7110-common: split out mmc0 reset pins from common into boards")
Tested-by: Matthias Brugger <mbrugger@suse.com>