V4:
 * remove conditional minItems: 2 and maxItems: 3 for clocks property
   since it is already set to that
 * remove renesas,r9a09g087-rspi check since it implies
   renesas,r9a09g077-rspi
 * replace contains: enum: with contains: const: since there's only one
   compatible to be checked against

V3:
 * no changes

V2:
 * fix missing unwind goto quit_resets
 * add resets: false and reset-names: false

Cosmin Tanislav (13):
  spi: rzv2h-rspi: make resets optional
  spi: rzv2h-rspi: make FIFO size chip-specific
  spi: rzv2h-rspi: make clocks chip-specific
  spi: rzv2h-rspi: move register writes out of rzv2h_rspi_setup_clock()
  spi: rzv2h-rspi: avoid recomputing transfer frequency
  spi: rzv2h-rspi: make transfer clock rate finding chip-specific
  spi: rzv2h-rspi: add support for using PCLK for transfer clock
  spi: rzv2h-rspi: add support for variable transfer clock
  spi: rzv2h-rspi: add support for loopback mode
  dt-bindings: spi: renesas,rzv2h-rspi: document RZ/T2H and RZ/N2H
  spi: rzv2h-rspi: add support for RZ/T2H and RZ/N2H
  arm64: dts: renesas: r9a09g077: Add SPIs support
  arm64: dts: renesas: r9a09g087: Add SPIs support

 .../bindings/spi/renesas,rzv2h-rspi.yaml      |  62 +++-
 arch/arm64/boot/dts/renesas/r9a09g077.dtsi    |  72 ++++
 arch/arm64/boot/dts/renesas/r9a09g087.dtsi    |  72 ++++
 drivers/spi/spi-rzv2h-rspi.c                  | 339 +++++++++++++++---
 4 files changed, 476 insertions(+), 69 deletions(-)

-- 
2.52.0

On Wed, 19 Nov 2025 18:14:21 +0200, Cosmin Tanislav wrote:
> V4:
>  * remove conditional minItems: 2 and maxItems: 3 for clocks property
>    since it is already set to that
>  * remove renesas,r9a09g087-rspi check since it implies
>    renesas,r9a09g077-rspi
>  * replace contains: enum: with contains: const: since there's only one
>    compatible to be checked against
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next

Thanks!

[01/13] spi: rzv2h-rspi: make resets optional
        commit: aead5ae91e4cbadac817d15737eca3b531237448
[02/13] spi: rzv2h-rspi: make FIFO size chip-specific
        commit: 8e89ee6cd2b928a8431bef61e8b851ce5df1ecb0
[03/13] spi: rzv2h-rspi: make clocks chip-specific
        commit: ebd7d6ae0dc7d65e21460c928519f40ccf95f3b9
[04/13] spi: rzv2h-rspi: move register writes out of rzv2h_rspi_setup_clock()
        commit: 1b7ce968ab2579702ea9dbc2fb599e540bbd8c88
[05/13] spi: rzv2h-rspi: avoid recomputing transfer frequency
        commit: 88782493204512fcf4e020e2385bca3e3c5bd4c0
[06/13] spi: rzv2h-rspi: make transfer clock rate finding chip-specific
        commit: 77d931584dd38916b66c65320c80a65cbef4b122
[07/13] spi: rzv2h-rspi: add support for using PCLK for transfer clock
        commit: 1ce3e8adc7d0038e59a7c9f5c9e5f399ba0db5d6
[08/13] spi: rzv2h-rspi: add support for variable transfer clock
        commit: 9c9bf4fdc5e5d09d5f4280ed2c582df6e1f837d9
[09/13] spi: rzv2h-rspi: add support for loopback mode
        commit: bc4f0b1e39035b9bb3d5d9692074702110f5e2b1
[10/13] dt-bindings: spi: renesas,rzv2h-rspi: document RZ/T2H and RZ/N2H
        commit: e93d7b2d8b349f659fa9456048ee86e10eb422f9
[11/13] spi: rzv2h-rspi: add support for RZ/T2H and RZ/N2H
        commit: 0cc8cd824b9fb7fb087a2ec6b0c80d812cc4fde7

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark