From: Daniel Hellstrom <daniel@gaisler.com>
Reserves space between the capability register and the next register
within the GRCAN driver to align with the hardware address layout.
Signed-off-by: Arun Muthusamy <arun.muthusamy@gaisler.com>
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
---
drivers/net/can/grcan.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/can/grcan.c b/drivers/net/can/grcan.c
index b0e2367fb163..8753bff4f917 100644
--- a/drivers/net/can/grcan.c
+++ b/drivers/net/can/grcan.c
@@ -48,7 +48,8 @@ struct grcan_registers {
u32 conf; /* 0x00 */
u32 stat; /* 0x04 */
u32 ctrl; /* 0x08 */
- u32 __reserved1[GRCAN_RESERVE_SIZE(0x08, 0x18)];
+ u32 cap; /* 0x0c */
+ u32 __reserved1[GRCAN_RESERVE_SIZE(0x0c, 0x18)];
u32 smask; /* 0x18 - CanMASK */
u32 scode; /* 0x1c - CanCODE */
u32 __reserved2[GRCAN_RESERVE_SIZE(0x1c, 0x40)];
--
2.51.0