Move falcon reading/writing to mbox functionality into helper so we can
use it from the sequencer resume flow.
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com>
---
drivers/gpu/nova-core/falcon.rs | 51 +++++++++++++++++++++++----------
1 file changed, 36 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/nova-core/falcon.rs b/drivers/gpu/nova-core/falcon.rs
index 30af7fc2814d..5c9f054a0f42 100644
--- a/drivers/gpu/nova-core/falcon.rs
+++ b/drivers/gpu/nova-core/falcon.rs
@@ -578,19 +578,13 @@ pub(crate) fn start(&self, bar: &Bar0) -> Result<()> {
Ok(())
}
- /// Start running the loaded firmware.
- ///
- /// `mbox0` and `mbox1` are optional parameters to write into the `MBOX0` and `MBOX1` registers
- /// prior to running.
- ///
- /// Wait up to two seconds for the firmware to complete, and return its exit status read from
- /// the `MBOX0` and `MBOX1` registers.
- pub(crate) fn boot(
+ /// Writes values to the mailbox registers if provided.
+ pub(crate) fn write_mailboxes(
&self,
bar: &Bar0,
mbox0: Option<u32>,
mbox1: Option<u32>,
- ) -> Result<(u32, u32)> {
+ ) -> Result<()> {
if let Some(mbox0) = mbox0 {
regs::NV_PFALCON_FALCON_MAILBOX0::default()
.set_value(mbox0)
@@ -602,18 +596,45 @@ pub(crate) fn boot(
.set_value(mbox1)
.write(bar, &E::ID);
}
+ Ok(())
+ }
- self.start(bar)?;
- self.wait_till_halted(bar)?;
+ /// Reads the value from `mbox0` register.
+ pub(crate) fn read_mailbox0(&self, bar: &Bar0) -> Result<u32> {
+ Ok(regs::NV_PFALCON_FALCON_MAILBOX0::read(bar, &E::ID).value())
+ }
- let (mbox0, mbox1) = (
- regs::NV_PFALCON_FALCON_MAILBOX0::read(bar, &E::ID).value(),
- regs::NV_PFALCON_FALCON_MAILBOX1::read(bar, &E::ID).value(),
- );
+ /// Reads the value from `mbox1` register.
+ pub(crate) fn read_mailbox1(&self, bar: &Bar0) -> Result<u32> {
+ Ok(regs::NV_PFALCON_FALCON_MAILBOX1::read(bar, &E::ID).value())
+ }
+ /// Reads values from both mailbox registers.
+ pub(crate) fn read_mailboxes(&self, bar: &Bar0) -> Result<(u32, u32)> {
+ let mbox0 = self.read_mailbox0(bar)?;
+ let mbox1 = self.read_mailbox1(bar)?;
Ok((mbox0, mbox1))
}
+ /// Start running the loaded firmware.
+ ///
+ /// `mbox0` and `mbox1` are optional parameters to write into the `MBOX0` and `MBOX1` registers
+ /// prior to running.
+ ///
+ /// Wait up to two seconds for the firmware to complete, and return its exit status read from
+ /// the `MBOX0` and `MBOX1` registers.
+ pub(crate) fn boot(
+ &self,
+ bar: &Bar0,
+ mbox0: Option<u32>,
+ mbox1: Option<u32>,
+ ) -> Result<(u32, u32)> {
+ self.write_mailboxes(bar, mbox0, mbox1)?;
+ self.start(bar)?;
+ self.wait_till_halted(bar)?;
+ self.read_mailboxes(bar)
+ }
+
/// Returns the fused version of the signature to use in order to run a HS firmware on this
/// falcon instance. `engine_id_mask` and `ucode_id` are obtained from the firmware header.
pub(crate) fn signature_reg_fuse_version(
--
2.34.1