Hi Biju,
On Fri, 14 Nov 2025 at 11:52, Biju <biju.das.au@gmail.com> wrote:
> From: Biju Das <biju.das.jz@bp.renesas.com>
>
> RZ/G3E RSCI tx/rx supports both FIFO and non-FIFO mode. It has 32-stage
> FIFO. Add RSCI_PORT_SCI port ID for non-FIFO mode and RSCI_PORT_SCIF port
> ID for FIFO mode. Update the rx_trigger for both these modes.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Thanks for your patch!
> --- a/drivers/tty/serial/sh-sci-common.h
> +++ b/drivers/tty/serial/sh-sci-common.h
> @@ -8,6 +8,8 @@
> /* Private port IDs */
> enum SCI_PORT_TYPE {
> SCI_PORT_RSCI = BIT(7) | 0,
> + RSCI_PORT_SCI = BIT(7) | 1,
> + RSCI_PORT_SCIF = BIT(7) | 2,
Oh no... Anyone who can reminder what is the difference between
SCI_PORT_RSCI and RSCI_PORT_SCI?
And now some RSCI IDs use the SCI_PORT_* prefix, while others use the
RSCI_PORT_* prefix.
So what about renaming the existing SCI_PORT_RSCI to e.g.
RSCI_PORT_SCIF16, and adding new types RSCI_PORT_SCI and
RSCI_PORT_SCIF32?
> };
>
> enum SCI_CLKS {
> diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
> index 78fb3b6a318b..66ab85571230 100644
> --- a/drivers/tty/serial/sh-sci.c
> +++ b/drivers/tty/serial/sh-sci.c
> @@ -3326,6 +3326,9 @@ static int sci_init_single(struct platform_device *dev,
> case SCI_PORT_RSCI:
> sci_port->rx_trigger = 15;
Hmm, why is this 15, and not 16?
> break;
> + case RSCI_PORT_SCIF:
> + sci_port->rx_trigger = 32;
> + break;
> default:
> sci_port->rx_trigger = 1;
> break;
Anyone, all of the rx_trigger setting for RSCI variants is futile,
as rsci.c does not implement sci_port_ops.set_rtg() yet.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds