HAMAO IoT EVK uses PCIe5 to connect an SDX65 module for WWAN functionality
and PCIe3 to connect a SATA controller. These interfaces require multiple
voltage rails: PCIe5 needs 3.3V supplied by vreg_wwan, while PCIe3 requires
12V, 3.3V, and 3.3V AUX rails, controlled via PMIC GPIOs.
Add the required fixed regulators with related pin configuration, and
connect them to the PCIe3 and PCIe5 ports to ensure proper power for the
SDX65 module and SATA controller.
Signed-off-by: Ziyue Zhang <ziyue.zhang@oss.qualcomm.com>
Reviewed-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts | 83 ++++++++++++++++++++++
1 file changed, 83 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts b/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts
index 36dd6599402b..ac17f7cb8b3d 100644
--- a/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts
+++ b/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts
@@ -199,6 +199,48 @@ vreg_nvme: regulator-nvme {
regulator-boot-on;
};
+ vreg_pcie_12v: regulator-pcie-12v {
+ compatible = "regulator-fixed";
+
+ regulator-name = "VREG_PCIE_12V";
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+
+ gpio = <&pm8550ve_8_gpios 8 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+
+ pinctrl-0 = <&pcie_x8_12v>;
+ pinctrl-names = "default";
+ };
+
+ vreg_pcie_3v3: regulator-pcie-3v3 {
+ compatible = "regulator-fixed";
+
+ regulator-name = "VREG_PCIE_3P3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpio = <&pmc8380_3_gpios 6 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+
+ pinctrl-0 = <&pm_sde7_main_3p3_en>;
+ pinctrl-names = "default";
+ };
+
+ vreg_pcie_3v3_aux: regulator-pcie-3v3-aux {
+ compatible = "regulator-fixed";
+
+ regulator-name = "VREG_PCIE_3P3_AUX";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpio = <&pmc8380_3_gpios 8 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+
+ pinctrl-0 = <&pm_sde7_aux_3p3_en>;
+ pinctrl-names = "default";
+ };
+
/* Left unused as the retimer is not used on this board. */
vreg_rtmr0_1p15: regulator-rtmr0-1p15 {
compatible = "regulator-fixed";
@@ -844,6 +886,16 @@ &mdss_dp3_phy {
status = "okay";
};
+&pcie3_port {
+ vpcie12v-supply = <&vreg_pcie_12v>;
+ vpcie3v3-supply = <&vreg_pcie_3v3>;
+ vpcie3v3aux-supply = <&vreg_pcie_3v3_aux>;
+};
+
+&pcie5 {
+ vddpe-3v3-supply = <&vreg_wwan>;
+};
+
&pcie6a {
vddpe-3v3-supply = <&vreg_nvme>;
};
@@ -868,6 +920,17 @@ usb0_3p3_reg_en: usb0-3p3-reg-en-state {
};
};
+&pm8550ve_8_gpios {
+ pcie_x8_12v: pcie-12v-default-state {
+ pins = "gpio8";
+ function = "normal";
+ output-enable;
+ output-high;
+ bias-pull-down;
+ power-source = <0>;
+ };
+};
+
&pm8550ve_9_gpios {
usb0_1p8_reg_en: usb0-1p8-reg-en-state {
pins = "gpio8";
@@ -879,6 +942,26 @@ usb0_1p8_reg_en: usb0-1p8-reg-en-state {
};
};
+&pmc8380_3_gpios {
+ pm_sde7_aux_3p3_en: pcie-aux-3p3-default-state {
+ pins = "gpio8";
+ function = "normal";
+ output-enable;
+ output-high;
+ bias-pull-down;
+ power-source = <0>;
+ };
+
+ pm_sde7_main_3p3_en: pcie-main-3p3-default-state {
+ pins = "gpio6";
+ function = "normal";
+ output-enable;
+ output-high;
+ bias-pull-down;
+ power-source = <0>;
+ };
+};
+
&pmc8380_5_gpios {
usb0_pwr_1p15_reg_en: usb0-pwr-1p15-reg-en-state {
pins = "gpio8";
--
2.34.1On Wed, Nov 12, 2025 at 05:03:16PM +0800, Ziyue Zhang wrote:
> HAMAO IoT EVK uses PCIe5 to connect an SDX65 module for WWAN functionality
> and PCIe3 to connect a SATA controller. These interfaces require multiple
> voltage rails: PCIe5 needs 3.3V supplied by vreg_wwan, while PCIe3 requires
> 12V, 3.3V, and 3.3V AUX rails, controlled via PMIC GPIOs.
>
> Add the required fixed regulators with related pin configuration, and
> connect them to the PCIe3 and PCIe5 ports to ensure proper power for the
> SDX65 module and SATA controller.
>
> Signed-off-by: Ziyue Zhang <ziyue.zhang@oss.qualcomm.com>
> Reviewed-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts | 83 ++++++++++++++++++++++
> 1 file changed, 83 insertions(+)
>
> +&pmc8380_3_gpios {
> + pm_sde7_aux_3p3_en: pcie-aux-3p3-default-state {
What is sde7? Other than that:
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> + pins = "gpio8";
> + function = "normal";
> + output-enable;
> + output-high;
> + bias-pull-down;
> + power-source = <0>;
> + };
> +
> + pm_sde7_main_3p3_en: pcie-main-3p3-default-state {
> + pins = "gpio6";
> + function = "normal";
> + output-enable;
> + output-high;
> + bias-pull-down;
> + power-source = <0>;
> + };
> +};
> +
> &pmc8380_5_gpios {
> usb0_pwr_1p15_reg_en: usb0-pwr-1p15-reg-en-state {
> pins = "gpio8";
> --
> 2.34.1
>
--
With best wishes
Dmitry
On 11/13/2025 5:16 AM, Dmitry Baryshkov wrote:
> On Wed, Nov 12, 2025 at 05:03:16PM +0800, Ziyue Zhang wrote:
>> HAMAO IoT EVK uses PCIe5 to connect an SDX65 module for WWAN functionality
>> and PCIe3 to connect a SATA controller. These interfaces require multiple
>> voltage rails: PCIe5 needs 3.3V supplied by vreg_wwan, while PCIe3 requires
>> 12V, 3.3V, and 3.3V AUX rails, controlled via PMIC GPIOs.
>>
>> Add the required fixed regulators with related pin configuration, and
>> connect them to the PCIe3 and PCIe5 ports to ensure proper power for the
>> SDX65 module and SATA controller.
>>
>> Signed-off-by: Ziyue Zhang <ziyue.zhang@oss.qualcomm.com>
>> Reviewed-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
>> ---
>> arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts | 83 ++++++++++++++++++++++
>> 1 file changed, 83 insertions(+)
>>
>> +&pmc8380_3_gpios {
>> + pm_sde7_aux_3p3_en: pcie-aux-3p3-default-state {
> What is sde7? Other than that:
>
>
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
>
Hi Dmitry
I’m not sure what “sde7” refers to specifically. I saw this name in the
schematic, and the pin is labeled PM_SDE7_AUX_3P3, so I used that naming
in the DT.
BRs
Ziyue
>
>> + pins = "gpio8";
>> + function = "normal";
>> + output-enable;
>> + output-high;
>> + bias-pull-down;
>> + power-source = <0>;
>> + };
>> +
>> + pm_sde7_main_3p3_en: pcie-main-3p3-default-state {
>> + pins = "gpio6";
>> + function = "normal";
>> + output-enable;
>> + output-high;
>> + bias-pull-down;
>> + power-source = <0>;
>> + };
>> +};
>> +
>> &pmc8380_5_gpios {
>> usb0_pwr_1p15_reg_en: usb0-pwr-1p15-reg-en-state {
>> pins = "gpio8";
>> --
>> 2.34.1
>>
On 11/18/25 11:11 AM, Ziyue Zhang wrote:
>
> On 11/13/2025 5:16 AM, Dmitry Baryshkov wrote:
>> On Wed, Nov 12, 2025 at 05:03:16PM +0800, Ziyue Zhang wrote:
>>> HAMAO IoT EVK uses PCIe5 to connect an SDX65 module for WWAN functionality
>>> and PCIe3 to connect a SATA controller. These interfaces require multiple
>>> voltage rails: PCIe5 needs 3.3V supplied by vreg_wwan, while PCIe3 requires
>>> 12V, 3.3V, and 3.3V AUX rails, controlled via PMIC GPIOs.
>>>
>>> Add the required fixed regulators with related pin configuration, and
>>> connect them to the PCIe3 and PCIe5 ports to ensure proper power for the
>>> SDX65 module and SATA controller.
>>>
>>> Signed-off-by: Ziyue Zhang <ziyue.zhang@oss.qualcomm.com>
>>> Reviewed-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
>>> ---
>>> arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts | 83 ++++++++++++++++++++++
>>> 1 file changed, 83 insertions(+)
>>>
>>> +&pmc8380_3_gpios {
>>> + pm_sde7_aux_3p3_en: pcie-aux-3p3-default-state {
>> What is sde7? Other than that:
>>
>>
>> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
>>
> Hi Dmitry
>
> I’m not sure what “sde7” refers to specifically. I saw this name in the
It refers to "SD Express" which was connected to that PCIe host on some
flavors of the internal boards, and the naming must have stuck..
Konrad
On Tue, Nov 18, 2025 at 11:23:43AM +0100, Konrad Dybcio wrote:
> On 11/18/25 11:11 AM, Ziyue Zhang wrote:
> >
> > On 11/13/2025 5:16 AM, Dmitry Baryshkov wrote:
> >> On Wed, Nov 12, 2025 at 05:03:16PM +0800, Ziyue Zhang wrote:
> >>> HAMAO IoT EVK uses PCIe5 to connect an SDX65 module for WWAN functionality
> >>> and PCIe3 to connect a SATA controller. These interfaces require multiple
> >>> voltage rails: PCIe5 needs 3.3V supplied by vreg_wwan, while PCIe3 requires
> >>> 12V, 3.3V, and 3.3V AUX rails, controlled via PMIC GPIOs.
> >>>
> >>> Add the required fixed regulators with related pin configuration, and
> >>> connect them to the PCIe3 and PCIe5 ports to ensure proper power for the
> >>> SDX65 module and SATA controller.
> >>>
> >>> Signed-off-by: Ziyue Zhang <ziyue.zhang@oss.qualcomm.com>
> >>> Reviewed-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
> >>> ---
> >>> arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts | 83 ++++++++++++++++++++++
> >>> 1 file changed, 83 insertions(+)
> >>>
> >>> +&pmc8380_3_gpios {
> >>> + pm_sde7_aux_3p3_en: pcie-aux-3p3-default-state {
> >> What is sde7? Other than that:
> >>
> >>
> >> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> >>
> > Hi Dmitry
> >
> > I’m not sure what “sde7” refers to specifically. I saw this name in the
>
> It refers to "SD Express" which was connected to that PCIe host on some
> flavors of the internal boards, and the naming must have stuck..
Thanks!
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
--
With best wishes
Dmitry
On Wed, Nov 12, 2025 at 05:03:16PM +0800, Ziyue Zhang wrote:
> HAMAO IoT EVK uses PCIe5 to connect an SDX65 module for WWAN functionality
> and PCIe3 to connect a SATA controller. These interfaces require multiple
> voltage rails: PCIe5 needs 3.3V supplied by vreg_wwan, while PCIe3 requires
> 12V, 3.3V, and 3.3V AUX rails, controlled via PMIC GPIOs.
>
I love it! Thank you for the clear description.
Regards,
Bjorn
> Add the required fixed regulators with related pin configuration, and
> connect them to the PCIe3 and PCIe5 ports to ensure proper power for the
> SDX65 module and SATA controller.
>
> Signed-off-by: Ziyue Zhang <ziyue.zhang@oss.qualcomm.com>
> Reviewed-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts | 83 ++++++++++++++++++++++
> 1 file changed, 83 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts b/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts
> index 36dd6599402b..ac17f7cb8b3d 100644
> --- a/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts
> +++ b/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts
> @@ -199,6 +199,48 @@ vreg_nvme: regulator-nvme {
> regulator-boot-on;
> };
>
> + vreg_pcie_12v: regulator-pcie-12v {
> + compatible = "regulator-fixed";
> +
> + regulator-name = "VREG_PCIE_12V";
> + regulator-min-microvolt = <12000000>;
> + regulator-max-microvolt = <12000000>;
> +
> + gpio = <&pm8550ve_8_gpios 8 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> +
> + pinctrl-0 = <&pcie_x8_12v>;
> + pinctrl-names = "default";
> + };
> +
> + vreg_pcie_3v3: regulator-pcie-3v3 {
> + compatible = "regulator-fixed";
> +
> + regulator-name = "VREG_PCIE_3P3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + gpio = <&pmc8380_3_gpios 6 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> +
> + pinctrl-0 = <&pm_sde7_main_3p3_en>;
> + pinctrl-names = "default";
> + };
> +
> + vreg_pcie_3v3_aux: regulator-pcie-3v3-aux {
> + compatible = "regulator-fixed";
> +
> + regulator-name = "VREG_PCIE_3P3_AUX";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + gpio = <&pmc8380_3_gpios 8 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> +
> + pinctrl-0 = <&pm_sde7_aux_3p3_en>;
> + pinctrl-names = "default";
> + };
> +
> /* Left unused as the retimer is not used on this board. */
> vreg_rtmr0_1p15: regulator-rtmr0-1p15 {
> compatible = "regulator-fixed";
> @@ -844,6 +886,16 @@ &mdss_dp3_phy {
> status = "okay";
> };
>
> +&pcie3_port {
> + vpcie12v-supply = <&vreg_pcie_12v>;
> + vpcie3v3-supply = <&vreg_pcie_3v3>;
> + vpcie3v3aux-supply = <&vreg_pcie_3v3_aux>;
> +};
> +
> +&pcie5 {
> + vddpe-3v3-supply = <&vreg_wwan>;
> +};
> +
> &pcie6a {
> vddpe-3v3-supply = <&vreg_nvme>;
> };
> @@ -868,6 +920,17 @@ usb0_3p3_reg_en: usb0-3p3-reg-en-state {
> };
> };
>
> +&pm8550ve_8_gpios {
> + pcie_x8_12v: pcie-12v-default-state {
> + pins = "gpio8";
> + function = "normal";
> + output-enable;
> + output-high;
> + bias-pull-down;
> + power-source = <0>;
> + };
> +};
> +
> &pm8550ve_9_gpios {
> usb0_1p8_reg_en: usb0-1p8-reg-en-state {
> pins = "gpio8";
> @@ -879,6 +942,26 @@ usb0_1p8_reg_en: usb0-1p8-reg-en-state {
> };
> };
>
> +&pmc8380_3_gpios {
> + pm_sde7_aux_3p3_en: pcie-aux-3p3-default-state {
> + pins = "gpio8";
> + function = "normal";
> + output-enable;
> + output-high;
> + bias-pull-down;
> + power-source = <0>;
> + };
> +
> + pm_sde7_main_3p3_en: pcie-main-3p3-default-state {
> + pins = "gpio6";
> + function = "normal";
> + output-enable;
> + output-high;
> + bias-pull-down;
> + power-source = <0>;
> + };
> +};
> +
> &pmc8380_5_gpios {
> usb0_pwr_1p15_reg_en: usb0-pwr-1p15-reg-en-state {
> pins = "gpio8";
> --
> 2.34.1
>
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