On Wed, Nov 12, 2025 at 06:24:44PM +0000, Leo Yan wrote:
> Arm CPUs introduce several new types of memory operations, like MTE tag
> accessing, system register access for nested virtualization, memcpy &
> memset, and Guarded Control Stack (GCS).
>
> For memory operation details, Arm SPE provides information like data
> (parallel) processing, floating-point, predicated, atomic, exclusive,
> acquire/release, gather/scatter, and conditional.
>
> This commit introduces a field 'mem_op_ext' for extended operation type.
> The extended operation type can be combined with the existed operation
> type to express a memory type, for examples, a PERF_MEM_OP_GCS type can
> be set along with PERF_MEM_OP_LOAD to present a load operation for
> GCS register access.
>
> Bit fields are also added to represent detailed operation attributes.
>
> Signed-off-by: Leo Yan <leo.yan@arm.com>
Just ping perf core maintainers, is this uAPI change okay for you?
Thanks for Ian's and James' review!
Leo
> ---
> include/uapi/linux/perf_event.h | 32 ++++++++++++++++++++++++++++++--
> 1 file changed, 30 insertions(+), 2 deletions(-)
>
> diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h
> index 78a362b8002776e5ce83a0d7816601638c61ecc6..9b9fa59fd828756b5e8e93520da5a269f0dfff52 100644
> --- a/include/uapi/linux/perf_event.h
> +++ b/include/uapi/linux/perf_event.h
> @@ -1309,14 +1309,32 @@ union perf_mem_data_src {
> mem_snoopx : 2, /* Snoop mode, ext */
> mem_blk : 3, /* Access blocked */
> mem_hops : 3, /* Hop level */
> - mem_rsvd : 18;
> + mem_op_ext : 4, /* Extended type of opcode */
> + mem_dp : 1, /* Data processing */
> + mem_fp : 1, /* Floating-point */
> + mem_pred : 1, /* Predicated */
> + mem_atomic : 1, /* Atomic operation */
> + mem_excl : 1, /* Exclusive */
> + mem_ar : 1, /* Acquire/release */
> + mem_sg : 1, /* Scatter/Gather */
> + mem_cond : 1, /* Conditional */
> + mem_rsvd : 6;
> };
> };
> #elif defined(__BIG_ENDIAN_BITFIELD)
> union perf_mem_data_src {
> __u64 val;
> struct {
> - __u64 mem_rsvd : 18,
> + __u64 mem_rsvd : 6,
> + mem_cond : 1, /* Conditional */
> + mem_sg : 1, /* Scatter/Gather */
> + mem_ar : 1, /* Acquire/release */
> + mem_excl : 1, /* Exclusive */
> + mem_atomic : 1, /* Atomic operation */
> + mem_pred : 1, /* Predicated */
> + mem_fp : 1, /* Floating-point */
> + mem_dp : 1, /* Data processing */
> + mem_op_ext : 4, /* Extended type of opcode */
> mem_hops : 3, /* Hop level */
> mem_blk : 3, /* Access blocked */
> mem_snoopx : 2, /* Snoop mode, ext */
> @@ -1426,6 +1444,16 @@ union perf_mem_data_src {
> /* 5-7 available */
> #define PERF_MEM_HOPS_SHIFT 43
>
> +/* Extended type of memory opcode: */
> +#define PERF_MEM_EXT_OP_NA 0x0 /* Not available */
> +#define PERF_MEM_EXT_OP_MTE_TAG 0x1 /* MTE tag */
> +#define PERF_MEM_EXT_OP_NESTED_VIRT 0x2 /* Nested virtualization */
> +#define PERF_MEM_EXT_OP_MEMCPY 0x3 /* Memory copy */
> +#define PERF_MEM_EXT_OP_MEMSET 0x4 /* Memory set */
> +#define PERF_MEM_EXT_OP_SIMD 0x5 /* SIMD */
> +#define PERF_MEM_EXT_OP_GCS 0x6 /* Guarded Control Stack */
> +#define PERF_MEM_EXT_OP_SHIFT 46
> +
> #define PERF_MEM_S(a, s) \
> (((__u64)PERF_MEM_##a##_##s) << PERF_MEM_##a##_SHIFT)
>
>
> --
> 2.34.1
>