In the NVIDIA vGPU RFC [1], the PCI configuration space access is
required in nova-core for preparing gspVFInfo when vGPU support is
enabled. This series is the following up of the discussion with Danilo
for how to introduce support of PCI configuration space access in Rust
PCI abstractions.
This patch series is implemented based on kernel vertical fixes patches
[2][3].
v6:
- Implement config_space() and config_space_extended() in device::Bound
lifecycle. (Danilo)
- Fix the "use" in the comment for generating proper rust docs, verify
the output of rustdoc. (Miguel)
- Improve the comments of PCI configuration space when checking the
output of rustdoc.
v5:
- Remove fallible accessors of PCI configuration space. (Danilo)
- Add #[repr(usize)] for enum ConfigSpace. (Danilo)
- Refine the handling of return value in read accessors. (Danilo)
- Add debug_assert!() in pdev::cfg_size(). (Danilo)
- Add ConfigSpace.as_raw() for extracting the raw value. (Danilo)
- Rebase the patches on top of driver-core-testing branch.
- Convert imports touched by this series to vertical style.
v4:
- Refactor the SIZE constant to be an associated constant. (Alice)
- Remove the default method implementations in the Io trait. (Alice)
- Make cfg_size() private. (Danilo/Bjorn)
- Implement the infallible accessors of ConfigSpace. (Danilo)
- Create a new Io64 trait specifically for 64-bit accessors. (Danilo)
- Provide two separate methods for driver: config_space() and
config_space_extended(). (Danilo)
- Update the sample driver to test the infallible accessors. (Danilo)
v3:
- Turn offset_valid() into a private function of kernel::io:Io. (Alex)
- Separate try and non-try variants. (Danilo)
- Move all the {try_}{read,write}{8,16,32,64} accessors to the I/O trait.
(Danilo)
- Replace the hardcoded MMIO type constraint with a generic trait bound
so that register! macro can be used in other places. (Danilo)
- Fix doctest. (John)
- Add an enum for PCI configuration space size. (Danilo)
- Refine the patch comments. (Bjorn)
v2:
- Factor out common trait as 'Io' and keep the rest routines in original
'Io' as 'Mmio'. (Danilo)
- Rename 'IoRaw' to 'MmioRaw'. Update the bus MMIO implementation to use
'MmioRaw'.
- Introduce pci::Device<Bound>::config_space(). (Danilo)
- Implement both infallible and fallible read/write routines, the device
driver decicdes which version should be used.
This ideas of this series are:
- Factor out common traits for other accessors to share the same
compiling/runtime check like before.
- Factor the MMIO read/write macros from the define_read! and
define_write! macros. Thus, define_{read, write}! can be used in other
backends.
In detail:
* Introduce `call_mmio_read!` and `call_mmio_write!` helper macros
to encapsulate the unsafe FFI calls.
* Update `define_read!` and `define_write!` macros to delegate to
the call macros.
* Export `define_read` and `define_write` so they can be reused
for other I/O backends (e.g. PCI config space).
- Implement the PCI configuration space access backend in PCI
abstractions.
- Add tests for config space routines in rust PCI sample driver.
[1] https://lore.kernel.org/all/20250903221111.3866249-1-zhiw@nvidia.com/
[2] https://lore.kernel.org/all/20251104133301.59402-1-dakr@kernel.org/
[3] https://lore.kernel.org/all/20251105120352.77603-1-dakr@kernel.org/
Zhi Wang (7):
samples: rust: rust_driver_pci: use "kernel vertical" style for
imports
rust: devres: style for imports
rust: io: style for imports
rust: io: factor common I/O helpers into Io trait
rust: io: factor out MMIO read/write macros
rust: pci: add config space read/write support
sample: rust: pci: add tests for config space routines
drivers/gpu/nova-core/regs/macros.rs | 90 +++++---
drivers/gpu/nova-core/vbios.rs | 1 +
rust/kernel/devres.rs | 64 ++++--
rust/kernel/io.rs | 323 ++++++++++++++++++++-------
rust/kernel/io/mem.rs | 16 +-
rust/kernel/io/poll.rs | 8 +-
rust/kernel/pci.rs | 41 +++-
rust/kernel/pci/io.rs | 85 ++++++-
samples/rust/rust_driver_pci.rs | 38 +++-
9 files changed, 519 insertions(+), 147 deletions(-)
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2.51.0