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[PATCH V4 1/3] arm64: dts: qcom: sm8750: Add SDC2 nodes for sm8750 soc

Sarthak Garg posted 3 patches 3 months ago
There is a newer version of this series
[PATCH V4 1/3] arm64: dts: qcom: sm8750: Add SDC2 nodes for sm8750 soc
Posted by Sarthak Garg 3 months ago 
Add SD Card host controller for sm8750 soc.

Signed-off-by: Sarthak Garg <sarthak.garg@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sm8750.dtsi | 54 ++++++++++++++++++++++++++++
 1 file changed, 54 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qcom/sm8750.dtsi
index a82d9867c7cb..95b210fbfead 100644
--- a/arch/arm64/boot/dts/qcom/sm8750.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi
@@ -3482,6 +3482,60 @@ pcie0_phy: phy@1c06000 {
 			status = "disabled";
 		};
 
+		sdhc_2: mmc@8804000 {
+			compatible = "qcom,sm8750-sdhci", "qcom,sdhci-msm-v5";
+			reg = <0x0 0x08804000 0x0 0x1000>;
+
+			interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "hc_irq",
+					  "pwr_irq";
+
+			clocks = <&gcc GCC_SDCC2_AHB_CLK>,
+				 <&gcc GCC_SDCC2_APPS_CLK>,
+				 <&rpmhcc RPMH_CXO_CLK>;
+			clock-names = "iface",
+				      "core",
+				      "xo";
+
+			interconnects = <&aggre2_noc MASTER_SDCC_2 QCOM_ICC_TAG_ALWAYS
+					&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
+					<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+					&config_noc SLAVE_SDCC_2 QCOM_ICC_TAG_ACTIVE_ONLY>;
+			interconnect-names = "sdhc-ddr",
+					     "cpu-sdhc";
+
+			power-domains = <&rpmhpd RPMHPD_CX>;
+			operating-points-v2 = <&sdhc2_opp_table>;
+
+			qcom,dll-config = <0x0007442c>;
+			qcom,ddr-config = <0x80040868>;
+
+			iommus = <&apps_smmu 0x540 0x0>;
+			dma-coherent;
+
+			bus-width = <4>;
+			max-sd-hs-hz = <37500000>;
+
+			resets = <&gcc GCC_SDCC2_BCR>;
+
+			status = "disabled";
+
+			sdhc2_opp_table: opp-table {
+				compatible = "operating-points-v2";
+
+				opp-100000000 {
+					opp-hz = /bits/ 64 <100000000>;
+					required-opps = <&rpmhpd_opp_low_svs>;
+				};
+
+				opp-202000000 {
+					opp-hz = /bits/ 64 <202000000>;
+					required-opps = <&rpmhpd_opp_svs_l1>;
+				};
+			};
+		};
+
 		ufs_mem_phy: phy@1d80000 {
 			compatible = "qcom,sm8750-qmp-ufs-phy";
 			reg = <0x0 0x01d80000 0x0 0x2000>;
-- 
2.34.1
Re: [PATCH V4 1/3] arm64: dts: qcom: sm8750: Add SDC2 nodes for sm8750 soc
Posted by Krzysztof Kozlowski 3 months ago 
On 10/11/2025 09:50, Sarthak Garg wrote:
> Add SD Card host controller for sm8750 soc.
> 
> Signed-off-by: Sarthak Garg <sarthak.garg@oss.qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/sm8750.dtsi | 54 ++++++++++++++++++++++++++++
>  1 file changed, 54 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qcom/sm8750.dtsi
> index a82d9867c7cb..95b210fbfead 100644
> --- a/arch/arm64/boot/dts/qcom/sm8750.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi
> @@ -3482,6 +3482,60 @@ pcie0_phy: phy@1c06000 {
>  			status = "disabled";
>  		};
>  
> +		sdhc_2: mmc@8804000 {

Nothing improved.

Best regards,
Krzysztof
Re: [PATCH V4 1/3] arm64: dts: qcom: sm8750: Add SDC2 nodes for sm8750 soc
Posted by Sarthak Garg 3 months ago 
On 11/10/2025 2:43 PM, Krzysztof Kozlowski wrote:
> On 10/11/2025 09:50, Sarthak Garg wrote:
>> Add SD Card host controller for sm8750 soc.
>>
>> Signed-off-by: Sarthak Garg <sarthak.garg@oss.qualcomm.com>
>> ---
>>   arch/arm64/boot/dts/qcom/sm8750.dtsi | 54 ++++++++++++++++++++++++++++
>>   1 file changed, 54 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qcom/sm8750.dtsi
>> index a82d9867c7cb..95b210fbfead 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8750.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi
>> @@ -3482,6 +3482,60 @@ pcie0_phy: phy@1c06000 {
>>   			status = "disabled";
>>   		};
>>   
>> +		sdhc_2: mmc@8804000 {
> Nothing improved.
>
> Best regards,
> Krzysztof


I moved the sdhc_2 node to follow alphanumeric ordering and used hex in reg.
What extra is needed ?


Regards,
Sarthak
Re: [PATCH V4 1/3] arm64: dts: qcom: sm8750: Add SDC2 nodes for sm8750 soc
Posted by Konrad Dybcio 3 months ago 
On 11/10/25 10:25 AM, Sarthak Garg wrote:
> 
> On 11/10/2025 2:43 PM, Krzysztof Kozlowski wrote:
>> On 10/11/2025 09:50, Sarthak Garg wrote:
>>> Add SD Card host controller for sm8750 soc.
>>>
>>> Signed-off-by: Sarthak Garg <sarthak.garg@oss.qualcomm.com>
>>> ---
>>>   arch/arm64/boot/dts/qcom/sm8750.dtsi | 54 ++++++++++++++++++++++++++++
>>>   1 file changed, 54 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qcom/sm8750.dtsi
>>> index a82d9867c7cb..95b210fbfead 100644
>>> --- a/arch/arm64/boot/dts/qcom/sm8750.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi
>>> @@ -3482,6 +3482,60 @@ pcie0_phy: phy@1c06000 {
>>>               status = "disabled";
>>>           };
>>>   +        sdhc_2: mmc@8804000 {
>> Nothing improved.
>>
>> Best regards,
>> Krzysztof
> 
> 
> I moved the sdhc_2 node to follow alphanumeric ordering and used hex in reg.
> What extra is needed ?

Nodes with a unit address (numbers after @) are supposed to be sorted
by that register, just like any other register map

Konrad
Re: [PATCH V4 1/3] arm64: dts: qcom: sm8750: Add SDC2 nodes for sm8750 soc
Posted by Sarthak Garg 2 months, 4 weeks ago 
On 11/10/2025 4:38 PM, Konrad Dybcio wrote:
> On 11/10/25 10:25 AM, Sarthak Garg wrote:
>> On 11/10/2025 2:43 PM, Krzysztof Kozlowski wrote:
>>> On 10/11/2025 09:50, Sarthak Garg wrote:
>>>> Add SD Card host controller for sm8750 soc.
>>>>
>>>> Signed-off-by: Sarthak Garg <sarthak.garg@oss.qualcomm.com>
>>>> ---
>>>>    arch/arm64/boot/dts/qcom/sm8750.dtsi | 54 ++++++++++++++++++++++++++++
>>>>    1 file changed, 54 insertions(+)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qcom/sm8750.dtsi
>>>> index a82d9867c7cb..95b210fbfead 100644
>>>> --- a/arch/arm64/boot/dts/qcom/sm8750.dtsi
>>>> +++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi
>>>> @@ -3482,6 +3482,60 @@ pcie0_phy: phy@1c06000 {
>>>>                status = "disabled";
>>>>            };
>>>>    +        sdhc_2: mmc@8804000 {
>>> Nothing improved.
>>>
>>> Best regards,
>>> Krzysztof
>>
>> I moved the sdhc_2 node to follow alphanumeric ordering and used hex in reg.
>> What extra is needed ?
> Nodes with a unit address (numbers after @) are supposed to be sorted
> by that register, just like any other register map
>
> Konrad


Thanks for pointing out. Will update in V5.


Regards,
Sarthak

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