arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)
GPIOs 44-47 were previously reserved, preventing Linux from accessing
SPI11 (qupv1_se3). Since there is no TZ use case for these pins on Linux,
they can be safely unreserved. Removing them from the reserved list
resolves the SPI11 access issue for Linux.
Signed-off-by: Xueyao An <xueyao.an@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi b/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi
index 1aead50b8920..107ea8045f55 100644
--- a/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi
+++ b/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi
@@ -451,8 +451,7 @@ &remoteproc_cdsp {
};
&tlmm {
- gpio-reserved-ranges = <34 2>, /* TPM LP & INT */
- <44 4>; /* SPI (TPM) */
+ gpio-reserved-ranges = <34 2>; /* TPM LP & INT */
pcie4_default: pcie4-default-state {
clkreq-n-pins {
--
2.43.0
On Wed, 05 Nov 2025 13:45:47 +0800, Xueyao An wrote:
> GPIOs 44-47 were previously reserved, preventing Linux from accessing
> SPI11 (qupv1_se3). Since there is no TZ use case for these pins on Linux,
> they can be safely unreserved. Removing them from the reserved list
> resolves the SPI11 access issue for Linux.
>
>
Applied, thanks!
[1/1] arm64: dts: qcom: HAMOA-IOT-SOM: Unreserve GPIOs blocking SPI11 access
commit: f057dab41070210e0b9c0271ea70dee6ce1d992f
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
On 25-11-05 13:45:47, Xueyao An wrote:
> GPIOs 44-47 were previously reserved, preventing Linux from accessing
> SPI11 (qupv1_se3). Since there is no TZ use case for these pins on Linux,
> they can be safely unreserved. Removing them from the reserved list
> resolves the SPI11 access issue for Linux.
>
> Signed-off-by: Xueyao An <xueyao.an@oss.qualcomm.com>
Lowercase the hamoa-iot-som in subject line.
With that fixed:
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi b/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi
> index 1aead50b8920..107ea8045f55 100644
> --- a/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi
> +++ b/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi
> @@ -451,8 +451,7 @@ &remoteproc_cdsp {
> };
>
> &tlmm {
> - gpio-reserved-ranges = <34 2>, /* TPM LP & INT */
> - <44 4>; /* SPI (TPM) */
> + gpio-reserved-ranges = <34 2>; /* TPM LP & INT */
>
> pcie4_default: pcie4-default-state {
> clkreq-n-pins {
> --
> 2.43.0
>
On 11/5/25 6:45 AM, Xueyao An wrote: > GPIOs 44-47 were previously reserved, preventing Linux from accessing > SPI11 (qupv1_se3). Since there is no TZ use case for these pins on Linux, > they can be safely unreserved. Removing them from the reserved list > resolves the SPI11 access issue for Linux. > > Signed-off-by: Xueyao An <xueyao.an@oss.qualcomm.com> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Konrad
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